数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

M32C/8B 数据表(PDF) 125 Page - Renesas Technology Corp

部件名 M32C/8B
功能描述  RENESAS MCU M16C FAMILY / M32C/80 SERIES
PDF  406 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M32C/8B 数据表(HTML) 125 Page - Renesas Technology Corp

Back Button M32C/8B Datasheet HTML 121Page - Renesas Technology Corp M32C/8B Datasheet HTML 122Page - Renesas Technology Corp M32C/8B Datasheet HTML 123Page - Renesas Technology Corp M32C/8B Datasheet HTML 124Page - Renesas Technology Corp M32C/8B Datasheet HTML 125Page - Renesas Technology Corp M32C/8B Datasheet HTML 126Page - Renesas Technology Corp M32C/8B Datasheet HTML 127Page - Renesas Technology Corp M32C/8B Datasheet HTML 128Page - Renesas Technology Corp M32C/8B Datasheet HTML 129Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 125 / 406 page
background image
Under development
M32C/8B Group
11. Interrupts
Preliminary specification
Specifications in this manual are tentative and subject to change.
REJ09B0450-0050 Rev.0.50 Oct 31, 2008
Page 108 of 385
11.6.5
IPL Change when Interrupt Request is Acknowledged
When a peripheral function interrupt request is acknowledged, the priority level for the acknowledged interrupt
becomes the IPL level in the flag register.
Software interrupts and special interrupts have no interrupt priority level. If an interrupt that has no interrupt
priority level occurs, the value shown in Table 11.6 becomes the IPL level.
Table 11.6
Interrupts without Interrupt Priority Levels and IPL
11.6.6
Saving a Register
In the interrupt sequence, values of the FLG register and PC are saved to the stack.
Figure 11.8 shows the stack states before and after an interrupt request is acknowledged.
The other necessary registers are saved by a program at the beginning of the interrupt routine. The PUSHM
instruction can save multiple registers(1) in the register bank currently used.
Refer to 11.4 High-Speed Interrupt for the high-speed interrupt.
NOTE:
1. Selectable from registers R0, R1, R2, R3, A0, A1, SB, and FB.
Figure 11.8
Stack States Before and After Acknowledgement of Interrupt Request
Interrupt Source
IPL level
Watchdog timer, NMI, oscillation stop detection, voltage monitor,
DMACII end-of-transfer interrupt
7
Software, address match
Not changed
[SP]
SP value before
an interrupt is
generated
Stack state before an interrupt
request is acknowledged
Stack state after an interrupt
request is acknowledged
PCL: 8 low-order bits of PC
PCM: 8 middle-order bits of PC
PCH: 8 high-order bits of PC
FLGL: 8 low-order bits of FLG
FLGH: 8 high-order bits of FLG
Address
m
m - 1
m - 2
m - 3
m - 4
m + 1
m - 5
m - 6
Previous stack
contents
Previous stack
contents
Stack
MSB
LSB
00h
FLGL
Previous stack
contents
PCH
Previous stack
contents
[SP]
New SP value
m + 1
Address
Stack
PCM
PCL
MSB
LSB
m - 5
m - 6
m
m - 1
m - 2
m - 3
m - 4
FLGH



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com