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M32C/8B 数据表(PDF) 132 Page - Renesas Technology Corp |
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M32C/8B 数据表(HTML) 132 Page - Renesas Technology Corp |
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132 / 406 page  Under development M32C/8B Group 11. Interrupts Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 115 of 385 11.10 Address Match Interrupt The address match interrupt is non-maskable. This interrupt occurs immediately before executing the instruction stored in the address specified by the RMADi register (i = 0 to 7). Eight addresses can be set for the address match interrupt. The AIERi bit in the AIER register determines whether the interrupt is enabled or disabled. Figure 11.14 shows registers associated with the address match interrupt. Set the starting address of the instruction in the RMADi register. The address match interrupt does not occur if a table data or any address other than the starting address of the instruction is set. Figure 11.14 RMAD0 to RMAD7 Registers, AIER Register b7 b6 b5 b4 b1 b2 b3 Symbol AIER Address 0009h After Reset 00h b0 Function Bit Symbol Bit Name RW AIER5 AIER7 Address match interrupt 3 enable bit Address match interrupt 7 enable bit RW RW RW RW AIER4 RW AIER3 Address match interrupt 5 enable bit Address match interrupt 6 enable bit AIER6 Address Match Interrupt Enable Register Address match interrupt 4 enable bit Address match interrupt 1 enable bit AIER1 RW Address match interrupt 2 enable bit RW AIER2 0: interrupt disabled 1: interrupt enabled Address match interrupt 0 enable bit AIER0 RW 0: interrupt disabled 1: interrupt enabled 0: interrupt disabled 1: interrupt enabled 0: interrupt disabled 1: interrupt enabled 0: interrupt disabled 1: interrupt enabled 0: interrupt disabled 1: interrupt enabled 0: interrupt disabled 1: interrupt enabled 0: interrupt disabled 1: interrupt enabled b23 b16 b15 b7 b8 After Reset b0 Address Match Interrupt Register i (i = 0 to 7) Symbol RMAD0 RMAD1 RMAD2 RMAD3 RMAD4 RMAD5 RMAD6 RMAD7 Address 0012h to 0010h 0016h to 0014h 001Ah to 0018h 001Eh to 001Ch 002Ah to 0028h 002Eh to 002Ch 003Ah to 0038h 003Eh to 003Ch 000000h 000000h 000000h 000000h 000000h 000000h 000000h 000000h Setting Range Function RW Address register for the address match interrupt RW 000000h to FFFFFFh |
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