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H8S/2214 数据表(PDF) 494 Page - Renesas Technology Corp

部件名 H8S/2214
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2214 数据表(HTML) 494 Page - Renesas Technology Corp

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Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.4.00 Sep. 18, 2008 Page 434 of 872
REJ09B0189-0400
(10) Contention between Buffer Register Write and Input Capture
If the input capture signal is generated in the T
2 state of a buffer write cycle, the buffer operation
takes precedence and the write to the buffer register is not performed.
Figure 10.51 shows the timing in this case.
Input capture
signal
Write signal
Address
φ
TCNT
Buffer register write cycle
T1
T2
N
TGR
N
M
M
Buffer
register
Buffer register
address
Figure 10.51 Contention between Buffer Register Write and Input Capture



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