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H8S/2214 数据表(PDF) 277 Page - Renesas Technology Corp

部件名 H8S/2214
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2214 数据表(HTML) 277 Page - Renesas Technology Corp

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Section 7 DMA Controller
Rev.4.00 Sep. 18, 2008 Page 217 of 872
REJ09B0189-0400
7.5.4
Repeat Mode
Repeat mode can be specified by setting the RPE bit in DMACR to 1, and clearing the DTIE bit in
DMABCRL to 0. In repeat mode, MAR is updated after each byte or word transfer in response to
a single transfer request, and this is executed the number of times specified in ETCR. On
completion of the specified number of transfers, MAR and ETCRL are automatically restored to
their original settings and operation continues.
One address is specified by MAR, and the other by IOAR. The transfer direction can be specified
by the DTDIR bit in DMACR.
Table 7.9 summarizes register functions in repeat mode.
Table 7.9
Register Functions in Repeat Mode
Function
Register
DTDIR = 0
DTDIR = 1 Initial Setting
Operation
23
0
MAR
Source
address
register
Destination
address
register
Start address of
transfer destination
or transfer source
Incremented/
decremented every
transfer. Initial
setting is restored
when value reaches
H'0000
23
0
IOAR
15
H'FF
Destination
address
register
Source
address
register
Start address of
transfer source or
transfer destination
Fixed
0
ETCRH
7
0
ETCRL
7
Holds number of
transfers
Transfer counter
Number of transfers
Number of transfers
Fixed
Decremented every
transfer. Loaded
with ETCRH value
when count reaches
H'00
Legend:
MAR:
Memory address register
IOAR:
I/O address register
ETCR: Transfer count register
DTDIR: Data transfer direction bit



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