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EM357-RTR 数据表(PDF) 156 Page - Silicon Laboratories |
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EM357-RTR 数据表(HTML) 156 Page - Silicon Laboratories |
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156 / 241 page  Rev 1.3 156 TIM_IC1F [7:4] RW Input Capture 1 Filter. (Applies only if TIM_CC1S > 0.) See TIM_IC2F description above. TIM_IC1PSC [3:2] RW Input Capture 1 Prescaler. (Applies only if TIM_CC1S > 0.) See TIM_IC2PSC description above. TIM_CC1S [1:0] RW Capture / Compare 1 Selection. This configures the channel as an output or an input. If an input, it selects the input source. 00: Channel is an output. 01: Channel is an input and is mapped to TI1. 10: Channel is an input and is mapped to TI2. 11: Channel is an input and is mapped to TRGI. This requires an internal trigger input selected by the TIM_TS bit in the TIM_SMCR register. Note: TIM_CC1S may be written only when the channel is off (TIM_CC1E = 0 in the TIMx_CCER register). Bitname Bitfield Access Description |
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