EM357-RTR datasheet(155/241 Pages) SILABS

155 / 241 page

155

Rev 1.3

TIM_IC2F

[15:12]

Input Capture 1 Filter. (Applies only if TIM_CC2S > 0.)

This defines the frequency used to sample the TI2 input, Fsampling, and

the length of the digital filter applied to TI2. The digital filter requires N con-

secutive samples in the same state before being output.

0000: Fsampling = PCLK, no filtering.

0001: Fsampling = PCLK, N = 2.

0010: Fsampling = PCLK, N = 4.

0011: Fsampling = PCLK, N = 8.

0100: Fsampling = PCLK/2, N = 6.

0101: Fsampling = PCLK/2, N = 8.

0110: Fsampling = PCLK/4, N = 6.

0111: Fsampling = PCLK/4, N = 8.

1000: Fsampling = PCLK/8, N = 6.

1001: Fsampling = PCLK/8, N = 8.

1010: Fsampling = PCLK/16, N = 5.

1011: Fsampling = PCLK/16, N = 6.

1100: Fsampling = PCLK/16, N = 8.

1101: Fsampling = PCLK/32, N = 5.

1110: Fsampling = PCLK/32, N = 6.

1111: Fsampling = PCLK/32, N = 8.

Note:

PCLK is 12 MHz when using the 24 MHz crystal oscillator, and 6 MHz using

the 12 MHz RC oscillator.

TIM_IC2PSC

[11:10]

Input Capture 1 Prescaler. (Applies only if TIM_CC2S > 0.)

00: No prescaling, capture each time an edge is detected on the capture

input.

01: Capture once every 2 events.

10: Capture once every 4 events.

11: Capture once every 8 events.

TIM_CC2S

[9:8]

Capture / Compare 2 Selection.

This configures the channel as an output or an input. If an input, it selects

the input source.

00: Channel is an output.

01: Channel is an input and is mapped to TI2.

10: Channel is an input and is mapped to TI1.

11: Channel is an input and is mapped to TRGI. This mode requires an

internal trigger input selected by the TIM_TS bit in the TIMx_SMCR regis-

ter.

Note:

TIM_CC2S may be written only when the channel is off (TIM_CC2E = 0 in

the TIMx_CCER register).

TIM_OC1M

[6:4]

Output Compare 1 Mode. (Applies only if TIM_CC1S = 0.)

See TIM_OC2M description above.

TIM_OC1BE

Output Compare 1 Buffer Enable. (Applies only if TIM_CC1S = 0.)

See TIM_OC2BE description above.

TIM_OC1FE

[2]

Output Compare 1 Fast Enable. (Applies only if TIM_CC1S = 0.)

See TIM_OC2FE description above.

Bitname

Bitfield

Access

Description

EM357-RTR 数据表(PDF) 155 Page - Silicon Laboratories

EM357-RTR 数据表(HTML) 155 Page - Silicon Laboratories

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载