TNETV6446AINZWT datasheet(116/227 Pages) TI1

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TMS320DM6446

SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010

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6.8

General-Purpose Input/Output (GPIO)

The GPIO peripheral provides general-purpose pins that can be configured as either inputs or outputs.

When configured as an output, a write to an internal register can control the state driven on the output pin.

When configured as an input, the state of the input is detectable by reading the state of an internal

interrupt/event generation modes. The GPIO peripheral provides generic connections to external devices.

The GPIO pins are grouped into banks of 16 pins per bank (i.e., bank 0 consists of GPIO [0:15]).

The DM6446 GPIO peripheral supports the following:

•

Up to 54 1.8v GPIO pins, GPIO[0:53]

•

Up to 17 3.3v GPIO pins, GPIO3V[0:16] (GPIO[54:70])

•

Interrupts:

–

Up to 8 unique GPIO[0:7] interrupts from Bank 0

–

5 GPIO bank (aggregated) interrupt signals from each of the 5 banks of GPIOs

–

Interrupts can be triggered by rising and/or falling edge, specified for each interrupt capable GPIO

signal

•

DMA events:

–

Up to 8 unique GPIO DMA events from Bank 0

–

5 GPIO bank (aggregated) DMA event signals from each of the 5 banks of GPIOs

•

Set/clear functionality: Firmware writes 1 to corresponding bit position(s) to set or to clear GPIO

signal(s). This allows multiple firmware processes to toggle GPIO output signals without critical section

protection (disable interrupts, program GPIO, re-enable interrupts, to prevent context switching to

anther process during GPIO programming).

•

Separate Input/Output registers

•

Output register in addition to set/clear so that, if preferred by firmware, some GPIO output signals can

be toggled by direct write to the output register(s).

•

Output register, when read, reflects output drive status. This, in addition to the input register reflecting

pin status and open-drain I/O cell, allows wired logic be implemented.

The memory map for the GPIO registers is shown in Table 6-25. For more detailed information on GPIOs,

see the TMS320DM644x DMSoC General-Purpose Input/Output (GPIO) User's Guide (literature number

SPRUE25).

116

Peripheral and Electrical Specifications

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