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ST7LITE49K2 数据表(PDF) 123 Page - STMicroelectronics |
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ST7LITE49K2 数据表(HTML) 123 Page - STMicroelectronics |
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123 / 245 page ![]() ST7LITE49K2 On-chip peripherals 123/245 The OCiR register value required for a specific timing application can be calculated using the following formula: Equation 1 Where: If the timer clock is an external clock, the formula is: Equation 2 Where: Clearing the output compare interrupt request (that is, clearing the OCFi bit) is done by: 1. Reading the SR register while the OCFi bit is set. 2. Accessing (reading or writing) the OCiLR register. The following procedure is recommended to prevent the OCFi bit from being set between the time it is read and the time it is written to the OCiR register: ● Write to the OCiHR register (further compares are inhibited). ● Read the SR register (first step in the clearance of the OCFi bit, which may be already set). ● Write to the OCiLR register (enables the output compare function and clears the OCFi bit). Note: 1 After a processor write cycle to the OCiHR register, the output compare function is inhibited until the OCiLR register is also written. 2 If the OCiE bit is not set, the OCMPi pin is a general I/O port and the OLVLi bit does not appear when a match is found but an interrupt could be generated if the OCIE bit is set. 3 In both internal and external clock modes, OCFi and OCMPi are set while the counter value equals the OCiR register value (see Figure 63 for an example with fCPU/2 and Figure 64 for an example with fCPU/4). This behavior is the same in OPM or PWM mode. 4 The output compare functions can be used both for generating external events on the OCMPi pins even if the input capture mode is also used. 5 The value in the 16-bit OCiR register and the OLVi bit should be changed after each successful comparison in order to control an output waveform or establish a new elapsed timeout. Δt = output compare period (in seconds) fCPU = CPU clock frequency (in hertz) PRESC = timer prescaler factor (2, 4 or 8 depending on CC[1:0] bits, see : Timer A control register 2 (TACR2) on page 132) Δt = output compare period (in seconds) fEXT = external timer clock frequency (in hertz) Δ OCiR= Δ t * fCPU PRESC Δ OCiR= Δt * fEXT |
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