ST7LITE49K2 datasheet(224/245 Pages) STMICROELECTRONICS

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Electrical characteristics

ST7LITE49K2

224/245

13.10

Control pin characteristics

13.10.1

Asynchronous RESET pin

TA = -40 to 125 °C, unless otherwise specified.

Table 98.

Asynchronous RESET pin characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

VSS - 0.3

0.3VDD

VIH

Input high level voltage

0.7VDD

VDD+0.3

Vhys

Schmitt trigger voltage hysteresis(1)

VOL

Output low level voltage (2)

VDD= 5 V

IIO = +2 mA

200

RON

Pull-up equivalent resistor(3)

VIN=VSS

VDD = 5 V

305070

VDD = 3 V

90(1)

tw(RSTL)out

Generated reset pulse duration

Internal reset sources

90(1)

μs

th(RSTL)in

External reset pulse hold time(4)

μs

tg(RSTL)in

Filtered glitch duration

200

Data based on characterization results, not tested in production

The IIO current sunk must always respect the absolute maximum rating specified in Section Table 70. on page 194 and the

sum of IIO (I/O ports and control pins) must not exceed IVSS.

The RON pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin between VILmax

and VDD

To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on

RESET pin with a duration below th(RSTL)in can be ignored.

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