ZUSBOPTSC01ZAC datasheet(210/402 Pages) ZILOG

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I2C Master/Slave Controller

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

188

BRH = I2C Baud Rate High Byte

Most significant byte, BRG[15:8], of the I2C Baud Rate Generator’s reload value.

If the DIAG bit in the I2C Mode Register is set to 1, a read of the I2CBRH register returns

the current value of the I2C Baud Rate Counter[15:8].

BRL = I2C Baud Rate Low Byte

Least significant byte, BRG[7:0], of the I2C Baud Rate Generator’s reload value.

If the DIAG bit in the I2C Mode Register is set to 1, a read of the I2CBRL register returns

the current value of the I2C Baud Rate Counter[7:0]

I2C State Register

The read-only I2C State Register provides information about the state of the I2C bus and

the I2C bus controller.

When the DIAG bit of the I2C Mode Register is cleared, this register provides information

on the internal state of the I2C controller and I2C bus, as shown in Table 97. A more

detailed discussion of each bit follows this table.

When the DIAG bit of the I2C Mode Register is set, this register returns the value of the

I2C controller state machine, as shown in Table 98, which follows on page 190.

Table 95. I2C Baud Rate High Byte Register (I2CBRH)

BITS

FIELD

BRH

RESET

FFH

R/W

ADDR

F53H

Table 96. I2C Baud Rate Low Byte Register (I2CBRL)

BITS

FIELD

BRL

RESET

FFH

R/W

ADDR

F54H

Note:

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