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H8S/2214 数据表(PDF) 242 Page - Renesas Technology Corp

部件名 H8S/2214
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2214 数据表(HTML) 242 Page - Renesas Technology Corp

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Section 7 DMA Controller
Rev.4.00 Sep. 18, 2008 Page 182 of 872
REJ09B0189-0400
(2) Repeat Mode
Transfer Number Storage
Bit
:
15
14
13
12
11
10
9
8
ETCRH
:
Initial value :
*
*
*
*
*
*
*
*
R/W
:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Transfer Counter
Bit
:
7
6
5
4
3
2
1
0
ETCRL
:
Initial value :
*
*
*
*
*
*
*
*
R/W
:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
*: Undefined
In repeat mode, ETCR functions as transfer counter ETCRL (with a count range of 1 to 256) and
transfer number storage register ETCRH. ETCRL is decremented by 1 each time a transfer is
performed, and when the count reaches H'00, ETCRL is loaded with the value in ETCRH. At this
point, MAR is automatically restored to the value it had when the count was started. The DTE bit
in DMABCR is not cleared, and so transfers can be performed repeatedly until the DTE bit is
cleared by the user.
ETCR is not initialized by a reset or in standby mode.
7.2.4
DMA Control Register (DMACR)
Bit
:
7
6
5
4
3
2
1
0
DMACR
:
DTSZ
DTID
RPE
DTDIR
DTF3
DTF2
DTF1
DTF0
Initial value :
0
0
0
0
0
0
0
0
R/W
:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DMACR is an 8-bit readable/writable register that controls the operation of each DMAC channel.
DMACR is initialized to H'00 by a reset, and in standby mode.



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