H8SSLASH2214 datasheet(243/936 Pages) RENESAS

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Section 7 DMA Controller

Rev.4.00 Sep. 18, 2008 Page 183 of 872

REJ09B0189-0400

Bit 7—Data Transfer Size (DTSZ): Selects the size of data to be transferred at one time.

Bit 7

DTSZ

Description

Byte-size transfer

(Initial value)

Word-size transfer

Bit 6—Data Transfer Increment/Decrement (DTID): Selects incrementing or decrementing of

MAR every data transfer in sequential mode or repeat mode.

In idle mode, MAR is neither incremented nor decremented.

Bit 6

DTID

Description

MAR is incremented after a data transfer

(Initial value)

• When DTSZ = 0, MAR is incremented by 1 after a transfer

• When DTSZ = 1, MAR is incremented by 2 after a transfer

MAR is decremented after a data transfer

• When DTSZ = 0, MAR is decremented by 1 after a transfer

• When DTSZ = 1, MAR is decremented by 2 after a transfer

Bit 5—Repeat Enable (RPE): Used in combination with the DTIE bit in DMABCR to select the

mode (sequential, idle, or repeat) in which transfer is to be performed.

Bit 5

DMABCR

RPE

DTIE

Description

Transfer in sequential mode (no transfer end interrupt)

(Initial value)

Transfer in sequential mode (with transfer end interrupt)

Transfer in repeat mode (no transfer end interrupt)

Transfer in idle mode (with transfer end interrupt)

For details of operation in sequential, idle, and repeat mode, see section 7.5.2, Sequential Mode,

section 7.5.3, Idle Mode, and section 7.5.4, Repeat Mode.

Bit 4—Data Transfer Direction (DTDIR): To specify the data transfer direction (source or

destination).

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