AM79C971VCW datasheet(25/265 Pages) AMD

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Am79C971

If the MII port is not selected, the RX_DV pin can be left

floating.

RX_ER

Receive Error

Input

RX_ER is an input that indicates that the MII trans-

ceiver device has detected a coding error in the receive

frame currently being transferred on the RXD[3:0] pins.

When RX_ER is asserted while RX_DV is asserted, a

CRC error will be indicated in the receive descriptor for

the incoming receive frame. RX_ER is ignored while

RX_DV is deasserted. Special code groups generated

on RXD while RX_DV is deasserted are ignored (e.g.,

Bad SSD in TX and IDLE in T4). RX_ER transitions are

synchronous to RX_CLK rising edges.

Note: The RX_ER pin is multiplexed with the RXDAT

pin.

When RST is active, RX_ER is an input for NAND tree

testing.

If the MII port is not selected, the RX_ER pin can be left

floating.

MDC

Management Data Clock

Output

MDC is a non-continuous clock output that provides a

timing reference for bits on the MDIO pin. During MII

management port operations, MDC runs at a nominal

frequency of 2.5 MHz. When no management opera-

tions are in progress, MDC is driven LOW. The MDC is

derived from the external 20-MHz crystal.

If the MII port is not selected, the MDC pin can be left

floating.

MDIO

Management Data I/O

Input/Output

MDIO is the bidirectional MII management port data

pin. MDIO is an output during the header portion of the

management frame transfers and during the data por-

tions of write transfers. MDIO is an input during the

data portions of read data transfers. When an operation

is not in progress on the management port, MDIO is not

driven. MDIO transitions from the Am79C971 controller

are synchronous to MDC Falling edges.

If the PHY is attached through an MII physical connec-

tor, then the MDIO pin should be externally pulled down

to VSS with a 10-k

Ω

±5% resistor. If the PHY is on

board, then the MDIO pin should be externally pulled

up to VCC with a 10-k

Ω

±5% resistor.

When RST is active, MDIO is an input for NAND tree

testing.

Attachment Unit Interface

Collision In

Input

± is a differential input pair signaling the Am79C971

controller that a collision has been detected on the net-

work media, indicated by the CI

± inputs being driven

with a 10-MHz pattern of sufficient amplitude and pulse

width to meet ISO 8802-3 (IEEE/ANSI 802.3) stan-

dards. CI

± operates at pseudo ECL levels.

If the CI

± pins are not used, they should be tied to-

gether.

Data In

Input

± is a differential input pair to the Am79C971 control-

ler carrying Manchester encoded data from the net-

work. DI

± operates at pseudo ECL levels.

If the DI

± pins are not used, they should be tied to-

gether.

Data Out

Output

± is a differential output pair from the Am79C971

controller for transmitting Manchester encoded data to

the network. DO

± operates at pseudo ECL levels.

If the AUI is not used, DO

± should be left floating for

minimum power consumption.

10BASE-T Interface

RXD

10BASE-T Receive Data

Input

RXD

± are 10BASE-T port differential receivers. If the

10BASE-T interface is not used in a design, RXD+ and

RXD- should be connected to each other.

TXD

10BASE-T Transmit Data

Output

TXD

± are 10BASE-T port differential drivers.

TXP

10BASE-T Pre-Distortion Control

Output

These outputs provide transmit pre-distortion control in

conjunction with the 10BASE-T port differential drivers.

General Purpose Serial Interface

CLSN

Collision

Input

CLSN is an input that indicates a collision has occurred

on the network.

Note: The CLSN pin is multiplexed with the COL pin.

When RST is active, CLSN is an input for NAND tree

testing.

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