ST7LITE49K2 datasheet(182/245 Pages) STMICROELECTRONICS

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On-chip peripherals

ST7LITE49K2

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Note:

This bit should be set to enable interrupt only after the comparator has been switched ON,

i.e. when CMPON is set.

Once CMPON bit is set, it is recommended to wait the specified stabilization time before

setting CMPIE bit in order to avoid a spurious interrupt (see analog comparator

characteristics in Section 13: Electrical characteristics on page 192).

Bit 2 : CMP Comparator output

This bit is set or reset by software and cleared by hardware reset. It stores the value of

comparator output.

Bit 1 = COUT Comparator output enable on Port

This bit is set or cleared by software. When this bit is set, the comparator output is available

on PA7 port.

0 : Comparator interrupt flag cleared

1 : Comparator interrupt flag set and can generate interrupt if CMPIE is set.

Bit 0 : CMPON Comparator ON/OFF

This bit is set or cleared by software and reset by hardware reset. This bit is used to switch

ON/OFF the comparator, internal voltage reference and current bias which provides 4µA

current to both.

0: Comparator, internal voltage reference, Bias OFF (in power-down state).

1: Comparator, internal voltage reference, Bias ON

Note:

For the comparator interrupt generation, it takes 250 ns delay from comparator output

change to rising or falling edge of interrupt generated.

Table 60.

Analog comparator register map and reset values

Address

(Hex.)

label

0052h

VREFCR

Reset value

VCEXT

VCBGR

VR3

VR2

VR1

VR0

VCEXTB

0053h

CMPACR

Reset value

CHYST

CINV

CMPIF

CMPIE

CMP

COUT

CMPON

0054h

CMPBCR

Reset value

CHYST

CINV

CMPIF

CMPIE

CMP

COUT

CMPON

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