ST7LITE49K2 datasheet(214/245 Pages) STMICROELECTRONICS

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Electrical characteristics

ST7LITE49K2

214/245

13.9

I/O port pin characteristics

13.9.1

General characteristics

Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.

Table 95.

Electrical sensitivities

Symbol

Parameter

Conditions

Class

Static latch-up class

TA = +125 °C

Table 96.

General characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low level voltage

VSS - 0.3

0.3VDD

VIH

Input high level voltage

0.7VDD

VDD+0.3

Vhys

Schmitt trigger voltage

hysteresis(1)

400

Input leakage current

VSS ≤VIN ≤VDD

±1

μA

Static current consumption

induced by each floating

input pin(2)

Floating input mode

400

RPU

Weak pull-up equivalent

resistor(3)

VIN=VSS

VDD= 5 V

100

200

VDD= 3 V

200(1)

CIO

I/O pin capacitance

tf(IO)out

Output high to low level fall

time(1)

CL= 50 pF

Between 10% and 90%

tr(IO)out

Output low to high level rise

time(1)

tw(IT)in

External interrupt pulse

time(4)

1tCPU

Data based on validation/design results.

Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for

example or an external pull-up or pull-down resistor (see Figure 100). Static peak current value taken at a fixed VIN value,

based on design simulation and technology characteristics, not tested in production. This value depends on VDD and

temperature values.

The RPU pull-up equivalent resistor is based on a resistive transistor.

To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external

interrupt source.

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