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DSP56303 数据表(PDF) 214 Page - Freescale Semiconductor, Inc

部件名 DSP56303
功能描述  DSP56303 USER?셎 MANUAL
PDF  292 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

DSP56303 数据表(HTML) 214 Page - Freescale Semiconductor, Inc

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DSP56303 User’s Manual, Rev. 2
9-22
Freescale Semiconductor
Triple Timer Module
Figure 9-20. Timer Module Programming Model
9.4.2 Timer Prescaler Load Register (TPLR)
The TPLR is a read/write register that controls the prescaler divide factor (that is, the number that
the prescaler counter loads and begins counting from) and the source for the prescaler input
clock.
23
22
21
20
19
18
17
16
15
14
13
12
PS1
PS0
PL20
PL19
PL18
PL17
PL16
PL15
PL14
PL13
PL12
11
10
98
76543210
PL11
PL10
PL9
PL8
PL7
PL6
PL5
PL4
PL3
PL2
PL1
PL0
— Reserved bit. Read as 0. Write to 0 for future compatibility
Figure 9-21. Timer Prescaler Load Register (TPLR)
DO
DI
DIR
15
14
13
12
11
10
9
8
TC1
TC0
INV
TCIE
TE
765
43
210
Timer Control/Status
Register (TCSR)
Reserved bit. Read as 0. Write with 0 for future compatibility
23
0
Timer Load
Register (TLR)
23
22
21
20
19
18
17
16
23
0
Timer Compare
Register (TCPR)
PCE
TRM
TCF TOF
TOIE
TC2
23
0
Timer Count
Register (TCR)
TC3
TCSR0 = $FFFF8F
TCSR1 = $FFFF8B
TCSR2 = $FFFF87
TLR0 = $FFFF8E
TLR1 = $FFFF8A
TLR2 = $FFFF86
TCR0 = $FFFF8C
TCR1 = $FFFF88
TCR2 = $FFFF84
TCPR0 = $FFFF8D
TCPR1 = $FFFF89
TCPR2 = $FFFF85
23
0
Timer Prescaler Load
Register (TPLR)
TPLR = $FFFF83
23
0
Timer Prescaler Count
Register (TPCR)
TPLR = $FFFF82



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