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DSP56303 数据表(PDF) 218 Page - Freescale Semiconductor, Inc

部件名 DSP56303
功能描述  DSP56303 USER?셎 MANUAL
PDF  292 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

DSP56303 数据表(HTML) 218 Page - Freescale Semiconductor, Inc

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DSP56303 User’s Manual, Rev. 2
9-26
Freescale Semiconductor
Triple Timer Module
7–4
TC[3–0]
0
Timer Control
Control the source of the timer clock, the behavior of the TIO signal, and the
Timer mode of operation. Section 9.3, Operating Modes, on page 9-5
describes the timer operating modes in detail. To ensure proper operation,
the TC[3–0] bits should be changed only when the timer is disabled (that is,
when the TCSR[TE] bit is cleared).
Note:
If the clock is external, the counter is incremented by the transitions
on the TIO signal. The external clock is internally synchronized to
the internal clock, and its frequency should be lower than the
internal operating frequency divided by 4 (that is, CLK/4).
Bit Settings
Mode Characteristics
TC3
TC2
TC1
TC0
Mode
Number
Mode
Function
TIO
Clock
0
0
0
0
0
Timer and
GPIO
GPIO
1
Internal
0
0
0
1
1
Timer pulse
Outpu
t
Internal
0
0
1
0
2
Timer toggle
Outpu
t
Internal
0
0
1
1
3
Event counter
Input
Externa
l
0
1
0
0
4
Input width
measurement
Input
Internal
0
1
0
1
5
Input period
measurement
Input
Internal
0
1
1
0
6
Capture
event
Input
Internal
0
1
1
1
7
Pulse width
modulation
Outpu
t
Internal
1
0
0
0
8
Reserved
—
—
1
0
0
1
9
Watchdog
pulse
Outpu
t
Internal
1
0
1
0
10
Watchdog
Toggle
Outpu
t
Internal
10
1
1
11
Reserved
—
—
11
0
0
12
Reserved
—
—
11
0
1
13
Reserved
—
—
11
1
0
14
Reserved
—
—
11
1
1
15
Reserved
—
—
Note:
The GPIO function is enabled only if all of the TC[3–0] bits are 0.
3
0
Reserved. Write to zero for future compatibility.
Table 9-3. Timer Control/Status Register (TCSR) Bit Definitions (Continued)
Bit Number
Bit Name
Reset Value
Description



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