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DSP56303 数据表(PDF) 102 Page - Freescale Semiconductor, Inc |
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DSP56303 数据表(HTML) 102 Page - Freescale Semiconductor, Inc |
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102 / 292 page ![]() DSP56303 User’s Manual, Rev. 2 6-2 Freescale Semiconductor Host Interface (HI08) — HRW/HRD read/write select (HRW) or read strobe (HRD) — HDS/HWR data strobe (HDS) or write strobe (HWR) — HCS/HA10 host chip select (HCS) or host address line (HA10) — HREQ/HTRQ host request (HREQ) or host transmit request (HTRQ) — HACK/HRRQ host acknowledge (HACK) or host receive request (HRRQ) Note: The signals in the above list that are shown as asserted low (for example, HRD) all have programmable polarity. The default value following reset is shown in the above list. Mapping: — HI08 registers are mapped into eight consecutive locations in the host’s external bus address space. — The HI08 acts as a memory or I/O-mapped peripheral for microprocessors, microcontrollers, and so forth. Transfer modes: — Mixed 8-bit, 16-bit, and 24-bit data transfers, DSP-to-host and host-to-DSP — Host command Handshaking protocols: — Software polled — Interrupt-driven (Interrupts are compatible with most processors, including the MC68000, 8051, HC11, and Hitachi H8.) Data word: 8 bits Dedicated interrupts: — Separate request lines for each interrupt source — Special host commands force DSP core interrupts under host processor control. These commands are useful for • Real-time production diagnostics • Creation of a debugging window for program development • Host control protocols Interface capabilities: — Glueless interface (no external logic required) to •HC11 • Hitachi H8 • 8051 family • Thomson P6 family — Minimal glue logic (pull-ups, pull-downs) required to interface to •ISA bus • Freescale 68K family • Intel X86 family |
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