DSP56303 datasheet(105/292 Pages) FREESCALE

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Operation

DSP56303 User’s Manual, Rev. 2

Freescale Semiconductor

6-5

In GPIO mode, two additional registers (HDDR and HDR) are related to the HI08 peripheral. The

separate receive and transmit data paths are double buffered for efficient, high speed

asynchronous transfers. The host-side transmit data path (host writes) is also the DSP-side

receive path; the host-side receive data path (host reads) is also the DSP-side transmit path. The

Receive (RXH:RXM:RXL) and Transmit Data Registers (TXH:TXM:TXL) use the same host

address. During host writes to these addresses, the data is transferred to the Transmit Data

Registers while reads are performed from the Receive Data Registers.

6.4 Operation

The HI08 is a slave-only device, so the host is the master of all bus transfers. In host-to-DSP

transfers, the host writes data to the Transmit Data Registers (TXH:TXM:TXL). In DSP-to-host

transfers the host reads data from the Receive Data Registers (RXH:RXM:RXL). The DSP side

has access only to the Host Receive Data Register (HRX) and the Host Transmit Data Register

(HTX). Data automatically moves between the host-side data registers and the DSP-side data

registers when it is available. This double-buffered mechanism allows for fast data transfers but

creates a “pipeline” that can either stall communication (if the pipeline is either full or empty) or

cause erroneous data transfers (new data to be overwritten or old data to be read twice). The HI08

port has several handshaking mechanisms to counter these buffering effects.

Suppose the host is writing several pieces of data to the HI08 port. The host first uses one of the

handshaking protocols to determine whether any data previously written to the Transmit Data

Registers (TXH:TXM:TXL) has successfully transferred to the DSP side. If the host-side

Transmit Data Registers (TXH:TXM:TXL) are empty, the host writes the data to these registers.

The transfer to the DSP-side Host Receive Data Register (HRX) occurs only if HRX is empty

(that is, the DSP has read it). The DSP core then uses an appropriate handshaking protocol to

move data from the HRX to the receiving buffer or register. Without handshaking, the host might

overwrite data not transferred to the DSP side or the DSP might receive stale data.

Similarly, when the host performs multiple reads from the HI08 port Receive Data Registers

(RXH:RXM:RXL), the DSP side uses an appropriate handshaking protocol to determine whether

any data previously written to the Host Transmit Register (HTX) has successfully transferred to

the host-side registers. If HTX is empty, the DSP writes the data to this register. Data transfers to

the host-side Receive Data Registers (RXH:RXM:RXL) occur only if they are empty (that is, the

host has read them). The host can then use any of the available handshaking protocols to

determine whether more data is ready to be read. The DSP56303 HI08 port offers the following

handshaking protocols for data transfers with the host:

Software polling

Interrupts

Core DMA access

Host requests

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