DSP56303 datasheet(143/292 Pages) FREESCALE

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Operating Modes: Normal, Network, and On-Demand

DSP56303 User’s Manual, Rev. 2

Freescale Semiconductor

7-11

If CRB[FSL0] is set, RX and TX have different frame sync lengths. CRB[FSL0] is

ignored when CRB[SYN] is set.

7.4.6 Word Length Frame Sync and Data Word Timing

The CRB[FSR] bit controls the relative timing of the word length frame sync relative to the data

word timing.

When CRB[FSR] is cleared, the word length frame sync is generated (or expected) with

the first bit of the data word.

When CRB[FSR] is set, the word length frame sync is generated (or expected) with the

last bit of the previous word.

CRB[FSR] is ignored when a bit length frame sync is selected.

7.4.7 Frame Sync Polarity

The CRB[FSP] bit controls the polarity of the frame sync.

When CRB[FSP] is cleared, the polarity of the frame sync is positive; that is, the frame

sync signal is asserted high. The ESSI synchronizes on the leading edge of the frame sync

signal.

When CRB[FSP] is set, the polarity of the frame sync is negative; that is, the frame sync is

asserted low. The ESSI synchronizes on the trailing edge of the frame sync signal.

The ESSI receiver looks for a receive frame sync edge (leading edge if CRB[FSP] is cleared,

trailing edge if FSP is set) only when the previous frame is completed. If the frame sync is

asserted before the frame is completed (or before the last bit of the frame is received in the case

of a bit frame sync or a word-length frame sync with CRB[FSR] set), the current frame sync is

not recognized, and the receiver is internally disabled until the next frame sync.

Frames do not have to be adjacent; that is, a new frame sync does not have to follow the previous

frame immediately. Gaps of arbitrary periods can occur between frames. All the enabled

transmitters are tri-stated during these gaps.

7.4.8 Byte Format (LSB/MSB) for the Transmitter

Some devices, such as CODECs, require a MSB-first data format. Other devices, such as those

that use the AES–EBU digital audio format, require the LSB first. To be compatible with all

formats, the shift registers in the ESSI are bidirectional. You select either MSB or LSB by

programming CRB[SHFD].

If CRB[SHFD] is cleared, data is shifted into the receive shift register MSB first and

shifted out of the transmit shift register MSB first.

If CRB[SHFD] is set, data is shifted into the receive shift register LSB first and shifted out

of the transmit shift register LSB first.

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