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ADE9178 数据表(PDF) 104 Page - Analog Devices

部件名 ADE9178
功能描述  Energy Management DSP with PEN Fault Detection
PDF  122 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE9178 数据表(HTML) 104 Page - Analog Devices

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Data Sheet
ADE9178
REGISTER DETAILS: ADE9178
analog.com
Rev. A | 104 of 122
Table 34. ADE9178 Register Details (Continued)
Addr
Name
Bits
Bit Name
Settings
Description
Reset
Access
3
BIDIPHALF
Phase B Current Dip Condition
Detected. This bit is set when
the phase B current is in the
dip condition and is zero when
it is not in a dip condition, as
calculated by RMSHALF.
0x0
R/W1C
2
BVDIPHALF
Phase B Voltage Dip Condition
Detected. This bit is set when
the phase B voltage is in the
dip condition and is zero when
it is not in a dip condition, as
calculated by RMSHALF.
0x0
R/W1C
1
AIDIPHALF
Phase A Current Dip Condition
Detected. This bit is set when
the phase A current is in the
dip condition and is zero when
it is not in a dip condition, as
calculated by RMSHALF.
0x0
R/W1C
0
AVDIPHALF
Phase A Voltage Dip Condition
Detected. This bit is set when
the phase A voltage is in the
dip condition and is zero when
it is not in a dip condition, as
calculated by RMSHALF.
0x0
R/W1C
0x404
ERROR_STATUS
[31:23]
RESERVED
Reserved.
0x0
R
22
ERROR7
Internal Error. Reset ADE9178
and ADCs.
0x0
R/W1C
21
ERROR6
Internal Error. Reset ADE9178
and ADCs.
0x0
R/W1C
20
ADC3_STATUS2
ADC3 STATUS2. This bit is
set when one or more bits of
STATUS2 register of ADC3 are
set.
0x0
R/W1C
19
ADC3_STATUS1
ADC3 STATUS1. This bit is
set when one or more bits of
STATUS1 register of ADC3 are
set.
0x0
R/W1C
18
ADC3_STATUS0
ADC3 STATUS0. This bit is
set when one or more bits of
STATUS0 register of ADC3 are
set.
0x0
R/W1C
17
ADC2_STATUS2
ADC2 STATUS2. This bit is
set when one or more bits of
STATUS2 register of ADC2 are
set.
0x0
R/W1C
16
ADC2_STATUS1
ADC2 STATUS1. This bit is
set when one or more bits of
STATUS1 register of ADC2 are
set.
0x0
R/W1C
15
ADC2_STATUS0
ADC2 STATUS0. This bit is
set when one or more bits of
STATUS0 register of ADC2 are
set.
0x0
R/W1C



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