TMS320F2811 datasheet(106/173 Pages) TI

106 / 173 page

Electrical Specifications

106

April 2001 − Revised July 2007

SPRS174O

tw(RSL)

th(XPLLDIS)

th(XMP/MC)

tOSCST

VDDIO, VDD3VFL

VDDAn, VDDAIO

(3.3 V)

XCLKIN

XRS

XF/XPLLDIS

XMP/MC

VDD, VDD1 (1.8 V (or

1.9 V))

I/O Pins

XPLLDIS Sampling

Address/Data/

Control

XCLKOUT

(Don’t Care)

GPIOF14/XF (User-Code Dependent)

XCLKIN/8 (See Note A)

(Don’t Care)

Input Configuration (State Depends on Internal PU/PD)

User-Code Dependent

Address/Data/Control Valid Execution

Begins From External Boot Address 0x3FFFC0

User-Code Dependent

2.5 V

0.3 V

td(EX)

NOTES: A. Upon power up, SYSCLKOUT is XCLKIN/2 if the PLL is enabled. Since both the XTIMCLK and CLKMODE bits in the XINTCNF2

register come up with a reset state of 1, SYSCLKOUT is further divided by 4 before it appears at XCLKOUT. This explains why

XCLKOUT = XCLKIN/8 during this phase.

B. The state of the GPIO pins is undefined (i.e., they could be input or output) until the 1.8-V (or 1.9-V) supply reaches at least 1 V

and 3.3-V supply reaches 2.5 V..

See Note B

tsu(XPLLDIS)

Figure 6−12. Power-on Reset in Microprocessor Mode (XMP/MC = 1)

TMS320F2811 数据表(PDF) 106 Page - Texas Instruments

TMS320F2811 数据表(HTML) 106 Page - Texas Instruments

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