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TNETV2664FIBZWT 数据表(PDF) 15 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 15 Page - Texas Instruments |
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15 / 249 page ![]() C64x+CPU FetchPath DataPath Write Buffer L1D Cache L1D SRAM L1Data L1P Cache L1P SRAM L1Program L2Cache L2SRAM L2UnifiedData/ProgramMemory ExternalMemory 2x64Bit Legend: AddressableMemory CacheMemory DataPathsManagedBy CacheController TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 Figure 2-3. C64x+ Cache Memory Architecture Copyright © 2007–2009, Texas Instruments Incorporated Device Overview 15 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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