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TNETV2664FIBZWT 数据表(PDF) 33 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 33 Page - Texas Instruments |
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33 / 249 page  TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 Table 2-10. RESET and JTAG Terminal Functions SIGNAL OTHER(2) TYPE(1) DESCRIPTION ZWT ZDU (3) NAME NO. NO. RESET IPU RESET M4 R3 I Device reset DVDD33 – Reset output status pin. The RESETOUT pin indicates when the RESETOUT N3 T3 O/Z DVDD33 device is in reset. IPU POR N4 R2 I Power-on reset. DVDD33 JTAG IPU JTAG test-port mode select input. TMS R3 V3 I DVDD33 For proper device operation, do not oppose the IPU on this pin. – TDO P3 U2 O/Z JTAG test-port data output DVDD33 IPU TDI P4 U3 I JTAG test-port data input DVDD33 IPU TCK N1 U1 I JTAG test-port clock input DVDD33 JTAG test-port reset. For IEEE 1149.1 JTAG compatibility, see IPD TRST R2 V2 I the IEEE 1149.1 JTAG compatibility statement portion of this data DVDD33 sheet IPU EMU1 N2 T2 I/O/Z Emulation pin 1 DVDD33 IPU EMU0 P2 T1 I/O/Z Emulation pin 0 DVDD33 (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 3.9.1 , Pullup/Pulldown Resistors. (3) Specifies the operating I/O supply voltage for each signal Copyright © 2007–2009, Texas Instruments Incorporated Device Overview 33 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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