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TNETV2664FIBZWT 数据表(PDF) 42 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 42 Page - Texas Instruments |
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42 / 249 page  TMS320C6424 SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 www.ti.com Table 2-14. DDR2 Memory Controller Terminal Functions SIGNAL OTHER(2) TYPE(1) DESCRIPTION ZWT ZDU (3) NAME NO. NO. DDR2 Memory Controller DDR_CLK W7 AB7 I/O/Z DVDDR2 DDR2 Clock Output DDR_CLK W8 AB8 I/O/Z DVDDR2 DDR2 Differential Clock Output DDR_CKE V8 AA8 I/O/Z DVDDR2 DDR2 Clock Enable Output DDR_CS T9 Y11 I/O/Z DVDDR2 DDR2 Active Low Chip Select Output DDR_WE T8 Y10 I/O/Z DVDDR2 DDR2 Active Low Write Enable Output DDR_DQM[3] T16 Y18 I/O/Z DVDDR2 DDR2 Data Mask Outputs DQM3: For upper byte data bus DDR_D[31:24] DDR_DQM[2] T14 Y15 I/O/Z DVDDR2 DQM2: For DDR_D[23:16] DDR_DQM[1] T6 Y7 I/O/Z DVDDR2 DQM1: For DDR_D[15:8] DQM0: For lower byte DDR_D[7:0] DDR_DQM[0] T4 Y4 I/O/Z DVDDR2 DDR_RAS U7 Y8 I/O/Z DVDDR2 DDR2 Row Access Signal Output DDR_CAS T7 Y9 I/O/Z DVDDR2 DDR2 Column Access Signal Output DDR_DQS[0] U4 AA4 I/O/Z DVDDR2 Data strobe input/outputs for each byte of the 32-bit data bus. They are outputs to the DDR2 memory when writing and inputs DDR_DQS[1] U6 AA7 I/O/Z DVDDR2 when reading. They are used to synchronize the data DDR_DQS[2] U14 AA15 I/O/Z DVDDR2 transfers. DQS3 : For upper byte DDR_D[31:24] DQS2: For DDR_D[23:16] DDR_DQS[3] U16 AA18 I/O/Z DVDDR2 DQS1: For DDR_D[15:8] DQS0: For bottom byte DDR_D[7:0] DDR_BA[0] U8 AA9 Bank Select Outputs (BS[2:0]). Two are required to support DDR_BA[1] V9 AB9 I/O/Z DVDDR2 1Gb DDR2 memories. DDR_BA[2] U9 AB10 DDR_A[12] W9 AA10 DDR_A[11] W10 AA11 DDR_A[10] U10 AB11 DDR_A[9] U11 AA12 DDR_A[8] V10 Y12 DDR_A[7] V11 AB12 DDR_A[6] W11 AA13 I/O/Z DVDDR2 DDR2 Address Bus Output DDR_A[5] W12 Y13 DDR_A[4] V12 AB13 DDR_A[3] U12 AA14 DDR_A[2] V13 Y14 DDR_A[1] U13 AB14 DDR_A[0] W13 AB15 (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 3.9.1 , Pullup/Pulldown Resistors. (3) Fore more information, see the Recommended Operating Conditions table 42 Device Overview Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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