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TNETV2664FIBZWT 数据表(PDF) 12 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 12 Page - Texas Instruments |
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12 / 249 page  src2 src2 .D1 .M1 .S1 .L1 long src odd dst src2 src1 src1 src1 src1 even dst even dst odd dst dst1 dst src2 src2 src2 long src DA1 ST1b LD1b LD1a ST1a Data path A Odd register file A (A1, A3, A5...A31) Odd register file B (B1, B3, B5...B31) .D2 src1 dst src2 DA2 LD2a LD2b src2 .M2 src1 dst1 .S2 src1 even dst long src odd dst ST2a ST2b long src .L2 even dst odd dst src1 Data path B Control Register 32 MSB 32 LSB dst2 (A) 32 MSB 32 LSB 2x 1x 32 LSB 32 MSB 32 LSB 32 MSB dst2 (B) (B) (A) 8 8 8 8 32 32 32 32 (C) (C) Even register file A (A0, A2, A4...A30) Even register file B (B0, B2, B4...B30) (D) (D) (D) (D) A. On .M unit, dst2 is 32 MSB. B. On .M unit, dst1 is 32 LSB. C. On C64x CPU .M unit, src2 is 32 bits; on C64x+ CPU .M unit, src2 is 64 bits. D. On .L and .S units, odd dst connects to odd register files and even dst connects to even register files. TMS320C6424 SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 www.ti.com Figure 2-2. TMS320C64x+™ CPU (DSP Core) Data Paths 12 Device Overview Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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