TNETV2664FIBZWT datasheet(11/249 Pages) TI1

11 / 249 page

TMS320C6424

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SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

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Instruction Set Enhancement - As noted above, there are new instructions such as 32-bit

multiplications, complex multiplications, packing, sorting, bit manipulation, and 32-bit Galois field

multiplication.

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Exceptions Handling - Intended to aid the programmer in isolating bugs. The C64x+ CPU is able to

detect and respond to exceptions, both from internally detected sources (such as illegal op-codes) and

from system events (such as a watchdog time expiration).

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Privilege - Defines user and supervisor modes of operation, allowing the operating system to give a

basic level of protection to sensitive resources. Local memory is divided into multiple pages, each with

read, write, and execute permissions.

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Time-Stamp Counter - Primarily targeted for Real-Time Operating System (RTOS) robustness, a

free-running time-stamp counter is implemented in the CPU which is not sensitive to system stalls.

For more details on the C64x+ CPU and its enhancements over the C64x architecture, see the following

documents:

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TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732)

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TMS320C64x+ DSP Megamodule Reference Guide (literature number SPRU871)

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TMS320C64x to TMS320C64x+ CPU Migration Guide Application Report (literature number SPRAA84)

•

TMS320C64x+ DSP Cache User's Guide (literature number SPRU862)

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TNETV2664FIBZWT 数据表(PDF) 11 Page - Texas Instruments