TNETV2664FIBZWT datasheet(30/249 Pages) TI1

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TMS320C6424

SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

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2.5

Terminal Functions

The terminal functions tables (Table 2-7 through Table 2-29) identify the external signal names, the

associated pin (ball) numbers along with the mechanical package designator, the pin type, whether the pin

has any internal pullup or pulldown resistors, and a functional pin description. For more detailed

information on device configuration, peripheral selection, multiplexed/shared pin, and debugging

considerations, see the Device Configurations section of this data manual.

All device boot and configuration pins (except PCIEN) are multiplexed configuration pins— meaning they

are multiplexed with functional pins. These pins function as device boot and configuration pins only during

device reset. The input states of these pins are sampled and latched into the BOOTCFG register when

device reset is deasserted (see Note below). After device reset is deasserted, the values on these

multiplexed pins no longer have to hold the configuration.

The PCIEN pin is a standalone configuration pin. Its value is latched into the BOOTCFG register when

device reset is deasserted (see Note below). Unlike the multiplexed device boot and configuration pins,

the value on the PCIEN pin even after device reset is deasserted must hold the configuration.

For proper device operation, external pullup/pulldown resistors may be required on these device boot and

configuration pins. Section 3.9.1, Pullup/Pulldown Resistors discusses situations where external

pullup/pulldown resistors are required.

Note: Internal to the chip, the two device reset pins RESET and POR are logically AND’d together for the

purpose of latching device boot and configuration pins. The values on all device boot and configuration

pins are latched into the BOOTCFG register when the logical AND of RESET and POR transitions from

low-to-high.

Table 2-7. BOOT Terminal Functions

SIGNAL

OTHER(2)

TYPE(1)

DESCRIPTION

ZWT

ZDU

(3)

NAME

NO.

BOOT

GP[25]/

(BOOTMODE3)

G16

H21

Bootmode configuration bits. These bootmode functions along with

GP[24]/

the FASTBOOT function determine what device bootmode

(BOOTMODE2)

G15

L20

IPD

configuration is selected.

I/O/Z

DVDD33

The C6424 device supports several types of bootmodes along with a

GP[23]/

F15

K20

FASTBOOT option; for more details on the types/options, see

(BOOTMODE1)

F18

J20

Section 3.4.1, Boot Modes.

GP[22]/

(BOOTMODE0)

Fast Boot

GP[26]/

IPD

G17

K19

I/O/Z

0 = Not Fast Boot

(FASTBOOT)

DVDD33

1 = Fast Boot

EM_A[4]/GP[10]/(PL

IPD

A17

B21

I/O/Z

Fast Boot PLL Multiplier Select (PLLMS)

LMS2)

DVDD33

EM_A[1]/(ALE)/

IPD

These pins select the PLL multiplier for Fast Boot.

A16

B20

I/O/Z

GP[9]/(PLLMS1)

DVDD33

For more details, see Section 3.5.1.3, Fast Boot PLL Multiplier

EM_A[2]/(CLE)/

IPD

Select (PLLMS).

B16

A20

I/O/Z

GP[8]/(PLLMS0)

DVDD33

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(2)

IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external

pullup/pulldown resistors are required, see Section 3.9.1 , Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal

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