TNETV2664FIBZWT datasheet(36/249 Pages) TI1

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TMS320C6424

SPRS347D – MARCH 2007 – REVISED DECEMBER 2009

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Table 2-12. EMIFA Terminal Functions (EMIFA Pinout Mode 2, AEM[2:0] = 010) (continued)

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

ZWT

ZDU

NAME

NO.

This pin is multiplexed between EMIFA and GPIO.

For EMIFA, this is the Bank Address 1 output EM_BA[1].

EM_BA[1]/

IPD

When connected to an 8-bit asynchronous memory, this pin is the 2nd

C16

C20

I/O/Z

GP[5]/(AEM0)

DVDD33

bit of the address.

When connected to a 16-bit asynchronous memory, this pin is the

lowest order bit of the 16-bit word address.

This pin is multiplexed between EMIFA and GPIO.

IPD

EM_A[21]/GP[34]

D12

C16

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 21 output

DVDD33

EM_A[21].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[20]/PINTA/

IPD

C12

C15

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 20 output

GP[44]

DVDD33

EM_A[20].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[19]/PREQ/

IPD

B12

C14

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 19 output

GP[45]

DVDD33

EM_A[19].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[18]/PRST/

IPD

D11

A14

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 18 output

GP[46]

DVDD33

EM_A[18].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[17]/AD31/

IPD

A11

B14

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 17 output

GP[47]

DVDD33

EM_A[17].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[16]/PGNT/

IPD

C11

B13

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 16 output

GP[48]

DVDD33

EM_A[16].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[15]/AD29/

IPD

B11

C13

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 15 output

GP[49]

DVDD33

EM_A[15].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[14]/AD27/

IPD

A10

A13

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 14 output

GP[50]

DVDD33

EM_A[14].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[13]/AD25/

IPD

B10

A12

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 13 output

GP[51]

DVDD33

EM_A[13].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[12]/PCBE3/

IPD

D10

B12

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 12 output

GP[89]

DVDD33

EM_A[12].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[11]/AD24/

IPD

C10

C12

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 11 output

GP[90]

DVDD33

EM_A[11].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[10]/AD23/

IPD

B11

I/O/Z

For EMIFA (AEM[2:0] = 010), this pin is address bit 10 output

GP[91]

DVDD33

EM_A[10].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[9]/PIDSEL/

IPD

C11

I/O/Z

GP[92]

DVDD33

For EMIFA (AEM[2:0] = 010), this pin is address bit 9 output EM_A[9].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[8]/AD21/

IPD

A11

I/O/Z

GP[93]

DVDD33

For EMIFA (AEM[2:0] = 010), this pin is address bit 8 output EM_A[8].

This pin is multiplexed between EMIFA, PCI, and GPIO.

EM_A[7]/AD22/

IPD

C10

I/O/Z

GP[94]

DVDD33

For EMIFA (AEM[2:0] = 010), this pin is address bit 7 output EM_A[7].

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