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TNETV2664FIBZWT 数据表(PDF) 133 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 133 Page - Texas Instruments |
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133 / 249 page  TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 Table 6-1. C6424 Power and Clock Domains Power Domain Clock Domain Peripheral/Module Always On CLKIN UART0 Always On CLKIN UART1 Always On CLKIN I2C Always On CLKIN Timer0 Always On CLKIN Timer1 Always On CLKIN Timer2 Always On CLKIN PWM0 Always On CLKIN PWM1 Always On CLKIN PWM2 Always On CLKDIV3 DDR2 Always On CLKDIV3 EDMA Always On CLKDIV3 PCI Always On CLKDIV3 SCR Always On CLKDIV6 GPSC Always On CLKDIV6 LPSCs Always On CLKDIV6 PLLC1 Always On CLKDIV6 PLLC2 Always On CLKDIV6 Ice Pick Always On CLKDIV6 EMIFA Always On CLKDIV6 HPI Always On CLKDIV6 VLYNQ Always On CLKDIV6 EMAC Always On CLKDIV6 McASP0 Always On CLKDIV6 McBSP0 Always On CLKDIV6 McBSP1 Always On CLKDIV6 GPIO Always On CLKDIV1 C64x+ CPU Table 6-2. C6424 Clock Domains DOMAIN CLOCK FIXED RATIO vs. EXAMPLE SUBSYSTEM CLOCK DOMAIN SOURCE SYSCLK1 FREQUENCY FREQUENCY (MHz) Peripherals (CLKIN Domain) CLKIN PLLC1 AUXCLK(1) – 25 MHz DSP CLKDIV1 PLLC1 SYSCLK1 1:1 600 MHz EDMA3 CLKDIV3 PLLC1 SYSCLK2 1:3 200 MHz Peripherals (CLKDIV3 Domain) CLKDIV3 PLLC1 SYSCLK2 1:3 200 MHz Peripherals (CLKDIV6 Domain) CLKDIV6 PLLC1 SYSCLK3 1:6 100 MHz (1) PLLC1 AUXCLK runs at exactly the same frequency as the device clock source from the MXI/CLKIN pin. Copyright © 2007–2009, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 133 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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