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TNETV2664FIBZWT 数据表(PDF) 138 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 138 Page - Texas Instruments |
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138 / 249 page ![]() TMS320C6424 SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 www.ti.com Table 6-5. PSC Register Memory Map (continued) REGISTER HEX ADDRESS RANGE DESCRIPTION ACRONYM 0x01C4 1A34 MDCTL13 Module Control 13 Register (DDR2) 0x01C4 1A38 MDCTL14 Module Control 14 Register (EMIFA) 0x01C4 1A3C MDCTL15 Module Control 15 Register (PCI) 0x01C4 1A40 MDCTL16 Module Control 16 Register (McBSP0) 0x01C4 1A44 MDCTL17 Module Control 17 Register (McBSP1) 0x01C4 1A48 MDCTL18 Module Control 18 Register (I2C) 0x01C4 1A4C MDCTL19 Module Control 19 Register (UART0) 0x01C4 1A50 MDCTL20 Module Control 20 Register (UART1) 0x01C4 1A54 - Reserved 0x01C4 1A58 - Reserved 0x01C4 1A5C MDCTL23 Module Control 23 Register (PWM0) 0x01C4 1A60 MDCTL24 Module Control 24 Register (PWM1) 0x01C4 1A64 MDCTL25 Module Control 25 Register (PWM2) 0x01C4 1A68 MDCTL26 Module Control 26 Register (GPIO) 0x01C4 1A6C MDCTL27 Module Control 27 Register (TIMER0) 0x01C4 1A70 MDCTL28 Module Control 28 Register (TIMER1) 0x01C4 1A74 - 0x01C4 1A9B - Reserved 0x01C4 1A9C MDCTL39 Module Control 39 Register (C64x+ CPU) 0x01C4 1AA0 - Reserved 0x01C4 1AA4 - 0x01C4 1FFF - Reserved 6.4 Enhanced Direct Memory Access (EDMA3) Controller The EDMA controller handles all data transfers between memories and the device slave peripherals on the C6424 device. These data transfers include cache servicing, non-cacheable memory accesses, user-programmed data transfers, and host accesses. These are summarized as follows: • Transfer to/from on-chip memories – DSP L1D memory – DSP L2 memory • Transfer to/from external storage – DDR2 SDRAM – NAND flash – Asynchronous EMIF (EMIFA) • Transfer to/from peripherals/hosts – VLYNQ – HPI – McBSP0/1 – McASP0 – PWM – UART0/1 – PCI The EDMA supports two addressing modes: constant addressing and increment addressing. On the C6424, constant addressing mode is not supported by any peripheral or internal memory. For more information on these two addressing modes, see the TMS320C642x DSP Enhanced DMA (EDMA) Controller User's Guide (literature number SPRUEM5). 138 Peripheral Information and Electrical Specifications Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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