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ST7LITE49K2 数据表(PDF) 154 Page - STMicroelectronics

部件名 ST7LITE49K2
功能描述  Communication interfaces
PDF  245 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE49K2 数据表(HTML) 154 Page - STMicroelectronics

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On-chip peripherals
ST7LITE49K2
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I2C own address register (I2COAR1)
Reset value: 0000 0000 (00h)
In 7-bit addressing mode
Bits 7:1 = ADD[7:1] Interface address. These bits define the I2C bus address of the
interface. They are not cleared when the interface is disabled (PE=0).
Bit 0 = ADD0 Address direction bit.
This bit is don’t care, the interface acknowledges either 0 or 1. It is not cleared when
the interface is disabled (PE=0).
Note:
Address 01h is always ignored.
In 10-bit addressing mode
Bits 7:0 = ADD[7:0] Interface address. These are the least significant bits of the I2C
bus address of the interface. They are not cleared when the interface is disabled
(PE=0).
I2C own address register (I2COAR2)
Reset value: 0100 0000 (40h)
Bits 7:6 = FR[1:0] Frequency bits
These bits are set by software only when the interface is disabled (PE=0). To configure
the interface to I2C specified delays select the value corresponding to the
microcontroller frequency fCPU.
Bits 5:3 = Reserved
Bits 2:1 = ADD[9:8] Interface address
These are the most significant bits of the I2C bus address of the interface (10-bit mode
only). They are not cleared when the interface is disabled (PE=0).
Bit 0 = Reserved.
7
0
ADD7
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
Read / Write
7
0
FR1
FR0
0
0
0
ADD9
ADD8
0
Read / Write
Table 48.
Configuration of I2C delay times
fCPU
FR1
FR0
< 6 MHz
0
0
6 to 8 MHz
0
1



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