ST7LITE49K2 datasheet(172/245 Pages) STMICROELECTRONICS

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On-chip peripherals

ST7LITE49K2

172/245

Figure 80.

ST7LITE49K2 ADC block diagram

Digital A/D conversion result

The conversion is monotonic, meaning that the result never decreases if the analog input

does not and never increases if the analog input does not.

If the input voltage (VAIN) is greater than VDDA (high-level voltage reference) then the

conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without

overflow indication).

If the input voltage (VAIN) is lower than VSSA (low-level voltage reference) then the

conversion result in the ADCDRH and ADCDRL registers is 00 00h.

The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH

and ADCDRL registers. The accuracy of the conversion is described in the Electrical

Characteristics Section.

RAIN is the maximum recommended impedance for an analog input signal. If the impedance

is too high, this will result in a loss of accuracy due to leakage and sampling not being

completed in the alloted time.

CH2

CH1

EOC SPEED ADON

CH0

ADCCSR

AIN0

AIN1

ANALOG TO DIGITAL

CONVERTER

AINx

ANALOG

MUX

ADCDRH

ADCDRL

SLOW

CH3

RADC

CADC

HOLD CONTROL

fADC

fCPU

DIV 2

DIV 4

SLOW

bit

AMP

x 1

or x8

AMPSEL

bit

CAL

AMP

SEL

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