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LSM6DSV 数据表(PDF) 61 Page - STMicroelectronics |
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LSM6DSV 数据表(HTML) 61 Page - STMicroelectronics |
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61 / 187 page  9.11 INT2_CTRL (0Eh) INT2 pin control register (R/W) Each bit in this register enables a signal to be carried over INT2 when the MIPI I3C® dynamic address is not assigned (I²C or SPI is used). Some bits can be also used to trigger an IBI when the MIPI I3C® interface is used. The output of the pin is the OR combination of the signals selected here and in MD2_CFG (5Fh). Table 43. INT2_CTRL register INT2_EMB_ FUNC_ENDOP INT2_ CNT_BDR INT2_ FIFO_FULL INT2_ FIFO_OVR INT2_ FIFO_TH INT2_ DRDY_G_EIS INT2_ DRDY_G INT2_ DRDY_XL Table 44. INT2_CTRL register description INT2_EMB_FUNC_ENDOP Enables routing the embedded functions end of operations signal to the INT2 pin. Default value: 0 INT2_CNT_BDR Enables COUNTER_BDR_IA interrupt on INT2. Default value: 0 INT2_FIFO_FULL Enables FIFO full flag interrupt on INT2 pin.Default value: 0 INT2_FIFO_OVR Enables FIFO overrun interrupt on INT2 pin. Default value: 0 INT2_FIFO_TH Enables FIFO threshold interrupt on INT2 pin. Default value: 0 INT2_DRDY_G_EIS Enables gyroscope EIS data-ready interrupt on INT2 pin. Default value: 0 INT2_DRDY_G Gyroscope data-ready interrupt on INT2 pin. Default value: 0 INT2_DRDY_XL Accelerometer data-ready interrupt on INT2 pin. Default value: 0 9.12 WHO_AM_I (0Fh) WHO_AM_I register (R). This is a read-only register. Its value is fixed at 70h. Table 45. WhoAmI register 0 1 1 1 0 0 0 0 LSM6DSV INT2_CTRL (0Eh) DS13476 - Rev 2 page 61/187 |
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