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LSM6DSV 数据表(PDF) 66 Page - STMicroelectronics |
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LSM6DSV 数据表(HTML) 66 Page - STMicroelectronics |
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66 / 187 page ![]() 9.17 CTRL5 (14h) Control register 5 (R/W) Table 56. CTRL5 register 0(1) 0(1) 0(1) 0(1) 0(1) BUS_ACT_ SEL_1 BUS_ACT_ SEL_0 INT_EN_I3C 1. This bit must be set to 0 for the correct operation of the device. Table 57. CTRL5 register description BUS_ACT_SEL_[1:0] Bus available time selection for IBI (in-band interrupt): 00: 2 µs; 01: 50 µs (default); 10: 1 ms; 11: 25 ms) INT_EN_I3C Enables INT pin when I3C is enabled. Default value: 0 (0: disabled; 1: enabled) 9.18 CTRL6 (15h) Control register 6 (R/W) Table 58. CTRL6 register 0(1) LPF1_G_ BW_2 LPF1_G_ BW_1 LPF1_G_ BW_0 FS_G_3 FS_G_2 FS_G_1 FS_G_0 1. This bit must be set to 0 for the correct operation of the device. Table 59. CTRL6 register description LPF1_G_BW_[2:0] Gyroscope low-pass filter (LPF1) bandwidth selection Table 60 shows the selectable bandwidth values (available if OIS and/or EIS are disabled). FS_G_[3:0] Gyroscope UI chain full-scale selection: (0000: ±125 dps (default); 0001: ±250 dps; 0010: ±500 dps; 0011: ±1000 dps; 0100: ±2000 dps; 1100: ±4000 dps(1) Others: reserved) 1. When FS = ±4000 dps is selected, the OIS chain must be disabled (OIS_XL_EN, OIS_G_EN and SPI2_READ_EN bits of UI_CTRL1_OIS (70h) / SPI2_CTRL1_OIS (70h) must be set to 0). LSM6DSV CTRL5 (14h) DS13476 - Rev 2 page 66/187 |
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