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LSM6DSV 数据表(PDF) 91 Page - STMicroelectronics |
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LSM6DSV 数据表(HTML) 91 Page - STMicroelectronics |
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91 / 187 page  9.54 TAP_CFG1 (57h) Tap configuration register 1 (R/W) Table 147. TAP_CFG1 register TAP_ PRIORITY_2 TAP_ PRIORITY_1 TAP_ PRIORITY_0 TAP_ THS_X_4 TAP_ THS_X_3 TAP_ THS_X_2 TAP_ THS_X_1 TAP_ THS_X_0 Table 148. TAP_CFG1 register description TAP_PRIORITY_[2:0] Selection of axis priority for tap detection (see Table 149) TAP_THS_X_[4:0] X-axis tap recognition threshold. Default value: 0 1 LSB = FS_XL / (25) Table 149. TAP priority decoding TAP_PRIORITY_[2:0] Max. priority Mid. priority Min. priority 000 X Y Z 001 Y X Z 010 X Z Y 011 Z Y X 100 X Y Z 101 Y Z X 110 Z X Y 111 Z Y X 9.55 TAP_CFG2 (58h) Tap configuration register 2 (R/W) Table 150. TAP_CFG2 register 0(1) 0(1) 0(1) TAP_ THS_Y_4 TAP_ THS_Y_3 TAP_ THS_Y_2 TAP_ THS_Y_1 TAP_ THS_Y_0 1. This bit must be set to 0 for the correct operation of the device. Table 151. TAP_CFG2 register description TAP_THS_Y_[4:0] Y-axis tap recognition threshold. Default value: 0 1 LSB = FS_XL / (25) LSM6DSV TAP_CFG1 (57h) DS13476 - Rev 2 page 91/187 |
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