LSM6DSV datasheet(125/187 Pages) STMICROELECTRONICS

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13.12

FSM_STATUS (13h)

Finite state machine status register (R)

Table 272. FSM_STATUS register

IS_FSM8

IS_FSM7

IS_FSM6

IS_FSM5

IS_FSM4

IS_FSM3

IS_FSM2

IS_FSM1

Table 273. FSM_STATUS register description

IS_FSM8

Interrupt status bit for FSM8 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM7

Interrupt status bit for FSM7 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM6

Interrupt status bit for FSM6 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM5

Interrupt status bit for FSM5 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM4

Interrupt status bit for FSM4 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM3

Interrupt status bit for FSM3 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM2

Interrupt status bit for FSM2 interrupt event. (1: interrupt detected; 0: no interrupt)

IS_FSM1

Interrupt status bit for FSM1 interrupt event. (1: interrupt detected; 0: no interrupt)

13.13

PAGE_RW (17h)

Enable read and write mode of advanced features dedicated page (R/W)

Table 274. PAGE_RW register

EMB_

FUNC_LIR

PAGE_

WRITE

PAGE_

READ

0(1)

1. This bit must be set to 0 for the correct operation of the device.

Table 275. PAGE_RW register description

EMB_FUNC_LIR

Latched interrupt mode for embedded functions. Default value: 0

(0: embedded functions interrupt request not latched;

1: embedded functions interrupt request latched)

PAGE_WRITE

Enables writes to the selected advanced features dedicated page.(1) Default value: 0

(1: enable; 0: disable)

PAGE_READ

Enables reads from the selected advanced features dedicated page.(1) Default value: 0

(1: enable; 0: disable)

1. Page selected by PAGE_SEL[3:0] in PAGE_SEL (02h) register.

LSM6DSV

FSM_STATUS (13h)

DS13476 - Rev 2

page 125/187

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