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DSP56303 数据表(PDF) 111 Page - Freescale Semiconductor, Inc |
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DSP56303 数据表(HTML) 111 Page - Freescale Semiconductor, Inc |
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111 / 292 page ![]() Boot-up Using the HI08 Host Port DSP56303 User’s Manual, Rev. 2 Freescale Semiconductor 6-11 6.5 Boot-up Using the HI08 Host Port The DSP56300 core has eight bootstrap operating modes to start up after reset. As the processor exits the Reset state the value at the external mode pins MODA/IRQA, MODB/IRQB, MODC/IRQC and MODD /IRQD are loaded into the Chip Operating Mode bits (MA, MB, MC and MD) of the Operating Mode Register (OMR). These bits determine the bootstrap operating mode. Modes C, D, E and F use the HI08 host port to bootstrap the application code to the DSP. Table 6-7 describes these modes. The bootstrap program is factory-programmed into an internal 192-word by 24-bit bootstrap ROM at locations $FF0000–$FF00BF of P memory. This program can load program RAM segment from the HI08 host port. When any of the modes in the preceding table are used, the core begins executing the bootstrap program and configures the HI08 based on the OMR mode bits. The bootstrap program then expects the following data sequence when the user program is downloaded from the HI08: 1. Three bytes (least significant byte first) indicating the number of 24-bit program words to be loaded. 2. Three bytes (least significant byte first) indicating the 24-bit starting address in P-memory to load the user's program. 3. The user program (three bytes, least significant byte first, for each program word). Once the bootstrap program finishes loading the specified number of words, it jumps to the specified starting address and executes the loaded program. 6.6 DSP Core Programming Model The DSP56300 core treats the HI08 as a memory-mapped peripheral occupying eight 24-bit words in X data memory space. The DSP can use the HI08 as a normal memory-mapped peripheral, employing either standard polled or interrupt-driven programming techniques. Separate transmit and receive data registers are double-buffered to allow the DSP and host processor to transfer data efficiently at high speed. Direct memory mapping allows the DSP56303 core to communicate with the HI08 registers using standard instructions and Table 6-7. HI08 Boot Modes Mode MODD MODC MODB MODA HI08 Bootstrap Description C 1100 ISA/DSP5630x mode D 1101 HC11 non-multiplexed bus mode E 1110 8051 multiplexed bus mode F 1111 MC68302 bus mode |
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