ADE9178 datasheet(112/122 Pages) AD

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Data Sheet

ADE9178

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Rev. A | 112 of 122

Table 34. ADE9178 Register Details (Continued)

Addr

Name

Bits

Bit Name

Settings

Description

Reset

Access

REVAPB

Phase B Active Power Sign

Change Mask. Set this bit to

enable an interrupt when the

phase B active power has

changed sign.

0x0

R/W

REVAPA

Phase A Active Power Sign

Change Mask. Set this bit to

enable an interrupt when the

phase A active power has

changed sign.

0x0

R/W

EGYRDY

Energy Data Ready Mask. Set

this bit to enable an interrupt

when the accumulated energy

values (xWATTHR, xAVHR …)

are updated.

0x0

R/W

0x407

MASK2

RESERVED

Reserved.

0x0

VACSWELLONE

VP2P Swell Condition

Detected. Set this bit to enable

an interrupt when the VP2P

(AV − CV) voltage is in the

swell condition and is zero

when it is not in a swell

condition, as calculated by

RMSONE.

0x0

R/W

VBCSWELLONE

VP2P Swell Condition

Detected. Set this bit to enable

an interrupt when the VP2P

(BV − CV) voltage is in the

swell condition and is zero

when it is not in a swell

condition, as calculated by

RMSONE.

0x0

R/W

VABSWELLONE

VP2P Swell Condition

Detected. Set this bit to enable

an interrupt when the VP2P

(AV − BV) voltage is in the

swell condition and is zero

when it is not in a swell

condition, as calculated by

RMSONE.

0x0

R/W

VACDIPONE

VP2P Dip Condition Detected.

Set this bit to enable an

interrupt when the VP2P (AV

− CV) voltage is in the dip

condition and is zero when it

is not in a dip condition, as

calculated by RMSONE.

0x0

R/W

VBCDIPONE

VP2P Dip Condition Detected.

Set this bit to enable an

interrupt when the VP2P (BV

− CV) voltage is in the dip

condition and is zero when it

is not in a dip condition, as

calculated by RMSONE.

0x0

R/W

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