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ADE9178 数据表(PDF) 114 Page - Analog Devices |
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ADE9178 数据表(HTML) 114 Page - Analog Devices |
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114 / 122 page ![]() Data Sheet ADE9178 REGISTER DETAILS: ADE9178 analog.com Rev. A | 114 of 122 Table 34. ADE9178 Register Details (Continued) Addr Name Bits Bit Name Settings Description Reset Access 17 CISWELLONE Phase C Current Swell Condition Detected. Set this bit to enable an interrupt when the phase C current is in the swell condition and is zero when it is not in a swell condition, as calculated by RMSONE. 0x0 R/W 16 CVSWELLONE Phase C Voltage Swell Condition Detected. Set this bit to enable an interrupt when the phase C voltage is in the swell condition and is zero when it is not in a swell condition, as calculated by RMSONE. 0x0 R/W 15 BISWELLONE Phase B Current Swell Condition Detected. Set this bit to enable an interrupt when the phase B current is in the swell condition and is zero when it is not in a swell condition, as calculated by RMSONE. 0x0 R/W 14 BVSWELLONE Phase B Voltage Swell Condition Detected. Set this bit to enable an interrupt when the phase B voltage is in the swell condition and is zero when it is not in a swell condition, as calculated by RMSONE. 0x0 R/W 13 AISWELLONE Phase A Current Swell Condition Detected. Set this bit to enable an interrupt when the phase A current is in the swell condition and is zero when it is not in a swell condition, as calculated by RMSONE. 0x0 R/W 12 AVSWELLONE Phase A Voltage Swell Condition Detected. Set this bit to enable an interrupt when the phase A voltage is in the swell condition and is zero when it is not in a swell condition, as calculated by RMSONE. 0x0 R/W 11 AUX5DIPONE Auxiliary 5 Channel Dip Condition Detected. Set this bit to enable an interrupt when the AUX5 channel is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W 10 AUX4DIPONE Auxiliary 4 Channel Dip Condition Detected. Set this bit to enable an interrupt when the AUX4 channel is in the dip condition and is zero when it is not in a dip condition, as calculated by RMSONE. 0x0 R/W |
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