AM79C970 datasheet(27/168 Pages) AMD

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AMD

P R E L I M I N A R Y

1-894

Am79C970

Target Initiated Termination

When the PCnet-PCI controller is a bus master, the cy-

cles it produces on the PCI bus may be terminated by

the target in one of three different ways.

Disconnect With Data Transfer

Figure 7 shows a disconnection in which one last data

transfer occurs after the target asserted

STOP. STOP is

asserted on clock 4 to start the termination sequence.

Data is still transferred during this cycles, since both

IRDY and TRDY are asserted. The PCnet-PCI control-

ler terminates the current transfer with the deassertion

FRAME on clock 5 and then one clock cycle later with

the deassertion

IRDY. It finally releases the bus on clock

6. The PCnet-PCI controller will re-request the bus after

2 clock cycles, if it wants to transfer more data. The

starting address of the new transfer will be the address

of the next untransferred data.

18220C-9

FRAME

CLK

IRDY

TRDY

DEVSEL

REQ

GNT

1234567

DATA

0000

0111

PAR

DEVSEL is sampled by the PCnet-PCI controller.

STOP

0111

ADDR +8

ADDR i

Figure 7. Disconnect with Data Transfer

AM79C970 数据表(PDF) 27 Page - Advanced Micro Devices

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