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AM79C970 数据表(PDF) 63 Page - Advanced Micro Devices

部件名 AM79C970
功能描述  PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
PDF  168 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM79C970 数据表(HTML) 63 Page - Advanced Micro Devices

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AMD
P R E L I M I N A R Y
1-930
Am79C970
Software may invoke DWIO mode by performing a Dou-
ble Word write access to the I/O location at offset 10h
(RDP). Note that even though the I/O resource mapping
changes when the I/O mode setting changes, the RDP
location offset is the same for both modes.
1-, 2- and 3-byte accesses to PCnet-PCI controller I/O
resources are not allowed during DWIO mode.
The mapping of the PCnet-PCI controller resources into
the 32-byte I/O space varies depending upon the setting
of the DWIO bit of BCR18. Depending upon the setting
of this variable, the 32-byte I/O space will be either Word
I/O mapped (WIO) or Double Word I/O mapped (DWIO).
A DWIO setting of 0 produces Word I/O mode, while a
DWIO setting of 1 produces Double Word I/O mapping.
DWIO is automatically programmed as active when the
system attempts a DWORD write access to offset 10h of
the PCnet-PCI controller I/O space. The power up reset
value of DWIO will be ZERO, and this value will be main-
tained until a DWORD access is performed to PCnet-
PCI controller I/O space.
Therefore, if DWIO mode is desired, it is imperative that
the first access to the PCnet-PCI controller be a
DWORD write access to offset 10h.
Alternatively, if DWIO mode is not desired, then it is im-
perative that the software never executes a DWORD
write access to offset 10h of the PCnet-PCI controller
I/O space.
Once the DWIO bit has been set to a ONE, only a hard-
ware H_RESET can reset it to a ZERO.
The DWIO mode setting is unaffected by the S_RESET
or setting the STOP bit.
WIO I/O Resource Map
When the PCnet-PCI controller I/O space is mapped as
Word I/O, then the resources that are allotted to the
PCnet-PCI controller occur on word boundaries that are
offset from the PCnet-PCI controller I/O base address
as shown in the following table:
No. of
Offset
Bytes
Register
0h
2
APROM
2h
2
APROM
4h
2
APROM
6h
2
APROM
8h
2
APROM
Ah
2
APROM
Ch
2
APROM
Eh
2
APROM
10h
2
RDP
12h
2
RAP (shared by RDP and BDP)
14h
2
Reset Register
16h
2
BDP
18h
2
Vendor Specific Word
1Ah
2
Reserved
1Ch
2
Reserved
1Eh
2
Reserved
When PCnet-PCI controller I/O space is Word mapped,
all I/O resources fall on word boundaries and all I/O re-
sources are word quantities. However, while in Word I/O
mode, APROM locations may also be accessed as indi-
vidual bytes either on odd or even byte addresses.
Attempts to write to any PCnet-PCI controller I/O re-
sources
(except to offset 10h, RDP) as 32 bit quantities
while in Word I/O mode are illegal and may cause unex-
pected reprogramming of the PCnet-PCI controller con-
trol registers. Attempts to
read from any PCnet-PCI
controller I/O resources as 32-bit quantities while in
Word
I/O
mode
are
illegal
and
will
yield
undefined values.
An attempt to write to offset 10h (RDP) as a 32 bit quan-
tity while in Word I/O mode will cause the PCnet-PCI
controller to exit WIO mode and immediately thereafter,
to enter DWIO mode.
Word accesses to non word address boundaries are not
allowed while in WIO mode. (A write access may cause
unexpected reprogramming of the PCnet-PCI controller
control registers. A read access will yield undefined
values.)
Accesses of non word quantities to any I/O resource are
not allowed while in WIO mode, with the exception of a
read to APROM locations. (A write access may cause
unexpected reprogramming of the PCnet-PCI controller
control registers; a read access will yield undefined val-
ues.)



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