AM79C970 datasheet(48/168 Pages) AMD

48 / 168 page

P R E L I M I N A R Y

AMD

1-915

Am79C970

When SSIZE32 = 1, software data structures are 32 bits

wide. The following diagram illustrates, Figure 23, the

relationship between the Initialization Base Address,

the Initialization Block, the Receive and Transmit

Descriptor Ring Base Addresses, the Receive and

Transmit Descriptors and the Receive and Transmit

Data Buffers, for the case of SSIZE32 = 1.

Initialization

Block

32-Bit Base Address

Pointer to

Initialization Block

CSR1

CSR2

Rcv

Buffers

RMD0

RMD1 RMD2 RMD3

Rcv Descriptor

Ring

•

1st desc.

start

2nd desc.

start

RMD0

Xmt

Buffers

RX DESCRIPTOR RINGS

TMD0

TMD1 TMD2 TMD3

RX DESCRIPTOR RINGS

Xmt Descriptor

Ring

•

1st desc.

start

2nd desc.

start

TMD0

Data

Buffer

Data

Buffer

Data

Buffer

Data

Buffer

Data

Buffer

Data

Buffer

PADR[31:0]

IADR[31:16]

IADR[15:0]

TLEN RES

RLEN RES

MODE

PADR[47:32]

RES

LADRF[31:0]

LADRF[63:32]

RDRA[31:0]

TDRA[31:0]

18220C-25

Figure 23

. 32-Bit Data Structures: Initialization Block and Descriptor Rings

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