AM79C970 datasheet(59/168 Pages) AMD

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P R E L I M I N A R Y

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Am79C970

inactivity, ’Link beat pulses’ will be periodically sent over

the twisted pair medium to constantly monitor me-

dium integrity.

When the link test function is enabled (DLNKTST bit in

CSR15 is cleared), the absence of link beat pulses and

receive data on the RXD

± pair will cause the TMAU to go

into a link fail state. In the link fail state, data transmis-

sion, data reception, data loopback and the collision de-

tection functions are disabled, and remain disabled until

valid data or >5 consecutive link pulses appear on the

RXD

± pair. During link fail, the Link Status (LNKST pin)

signal is inactive. When the link is identified as func-

tional, the Link Status signal is asserted. The

LNKST

pin displays the Link Status signal by default.

Transmission attempts during Link Fail state will pro-

duce no network activity and will produce LCAR and

CERR error indications.

In order to inter-operate with systems which do not im-

plement Link Test, this function can be disabled by set-

ting the DLNKTST bit in CSR15. With link test disabled,

the data driver, receiver and loopback functions as well

as collision detection remain enabled irrespective of the

presence or absence of data or link pulses on the RXD

pair. Link Test pulses continue to be sent regardless of

the state of the DLNKTST bit.

Polarity Detection and Reversal

The T-MAU receive function includes the ability to invert

the polarity of the signals appearing at the RXD

± pair if

the polarity of the received signal is reversed (such as in

the case of a wiring error). This feature allows data

frames received from a reverse wired RXD

± input pair to

be corrected in the T-MAU prior to transfer to the MEN-

DEC. The polarity detection function is activated follow-

ing H_RESET or Link Fail, and will reverse the receive

polarity based on both the polarity of any previous link

beat pulses and the polarity of subsequent frames with a

valid End Transmit Delimiter (ETD).

When in the Link Fail state, the T-MAU will recognize

link beat pulses of either positive or negative polarity.

Exit from the Link Fail state is made due to the reception

of 5 – 6 consecutive link beat pulses of identical polarity.

On entry to the Link Pass state, the polarity of the last 5

link beat pulses is used to determine the initial receive

polarity configuration and the receiver is reconfigured to

subsequently recognize only link beat pulses of the pre-

viously recognized polarity.

Positive link beat pulses are defined as received signal

with a positive amplitude greater than 585 mV (LRT =

HIGH) with a pulse width of 60 ns – 200 ns. This positive

excursion may be followed by a negative excursion.

This definition is consistent with the expected received

signal at a correctly wired receiver, when a link beat

pulse which fits the template of Figure 14-12 of the

10BASE-T Standard is generated at a transmitter and

passed through 100 m of twisted pair cable.

Negative link beat pulses are defined as received sig-

nals with a negative amplitude greater than 585 mV with

a pulse width of 60 ns – 200 ns. This negative excursion

may be followed by a positive excursion. This definition

is consistent with the expected received signal at a re-

verse wired receiver, when a link beat pulse which fits

the template of Figure 14-12 in the 10BASE-T Standard

is generated at a transmitter and passed through 100 m

of twisted pair cable.

The polarity detection/correction algorithm will remain

“armed” until two consecutive frames with valid ETD of

identical polarity are detected. When “armed”, the re-

ceiver is capable of changing the initial or previous po-

larity configuration based on the ETD polarity.

On receipt of the first frame with valid ETD following

H_RESET or link fail, the T-MAU will utilize the inferred

polarity information to configure its RXD

± input, regard-

less of its previous state. On receipt of a second frame

with a valid ETD with correct polarity, the detection/cor-

rection algorithm will “lock-in” the received polarity. If the

second (or subsequent) frame is not detected as con-

firming the previous polarity decision, the most recently

detected ETD polarity will be used as the default. Note

that frames with invalid ETD have no effect on updating

the previous polarity decision. Once two consecutive

frames with valid ETD have been received, the T-MAU

will disable the detection/correction algorithm until

either a Link Fail condition occurs or H_RESET

is activated.

During polarity reversal, an internal POL signal will be

active. During normal polarity conditions, this internal

POL signal is inactive. The state of this signal can be

read by software and/or displayed by LED when en-

abled by the LED control bits in the Bus Configuration

Registers (BCR4–BCR7).

Twisted-Pair Interface Status

Three signals (XMT, RCV and COL) indicate whether

the T-MAU is transmitting, receiving, or in a collision

state with both functions active simultaneously. These

signals are internal signals and the behavior of the LED

outputs depends on how the LED output circuitry

is programmed.

The T-MAU will power up in the Link Fail state and nor-

mal algorithm will apply to allow it to enter the Link Pass

state. In the Link Pass state, transmit or receive activity

will be indicated by assertion of RCV signal going active.

If T-MAU is selected using the PORTSEL bits in CSR15,

then when moving from AUI to T-MAU selection the

T-MAU will be forced into the LINK Fail state.

In the Link Fail state, XMT, RCV and COL are inactive.

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