AM79C970 datasheet(81/168 Pages) AMD

81 / 168 page

AMD

P R E L I M I N A R Y

1-948

Am79C970

CSR122

Receiver Packet Alignment Control

BCR2

Misc. configuration

BCR18

Bus Size and Burst Control Register

BCR20

Software Style

Running Registers

The following is a list of those registers that would typi-

cally need to be periodically read and perhaps written

during the normal running operation of the PCnet-PCI

controller within a system. Each of these registers con-

tains control bits or status bits or both.

RAP

CSR0

PCnet-PCI controller Status Register

CSR4

Test and Features Control

CSR112

Missed Frame Count

CSR114

Receive Collision Count

PCI Configuration Registers

The PCnet-PCI controller supports the 64-byte header

portion of the configuration space as defined by the PCI

specification revision 2.0. None of the device specific

registers in locations 64 – 255 are used. The layout of

the configuration registers in the header region is shown

in the table below. All registers required to identify the

PCnet-PCI controller and its function are implemented.

Additional registers are used to setup the configuration

of the PCnet-PCI controller in a system.

The configuration registers are accessible only by PCI

configuration cycles. They can be accessed right after

the PCnet-PCI controller is powered-on, even if the read

operation of the serial EEPROM is still on-going. All

multi-byte numeric fields follow little endian byte order-

ing. The Command register is the only register cleared

by H_RESET. S_RESET as well as asserting

SLEEP

have no effect on the value of the PCI configuration reg-

isters. All write accesses to Reserved locations have no

affect, reads from these locations will return a data value

of ZERO.

Vendor ID (Offset 00h)

The Vendor ID register is a 16-bit register that identifies

the manufacturer of the PCnet-PCI controller. Ad-

vanced Micro Devices, Inc.’s (AMD) Vendor ID is 1022h.

Note that this vendor ID is not the same as the Manufac-

turer ID in CSR88 and CSR89. The vendor ID is as-

signed by the PCI Special Interest Group.

The Vendor ID register is located at offset 00h in the PCI

Configuration Space. It is read only.

Device ID Register (Offset 02h)

The Device ID register is a 16-bit register that uniquely

identifies the PCnet-PCI controller within AMD’s prod-

uct line. The PCnet-PCI Device ID is 2000h. Note that

this Device ID is not the same as the Part number in

CSR88 and CSR89. The Device ID is assigned by Ad-

vanced Micro Devices, Inc.

The Device ID register is located at offset 02h in the PCI

Configuration Space. It is read only.

Device ID

Vendor ID

00h

Status

Command

04h

Base-Class

Sub-Class

Programming IF

Revision ID

08h

Reserved

Header Type

Latency Timer

Reserved

0Ch

Base Address

10h

Reserved

14h

Reserved

18h

Reserved

1Ch

Reserved

20h

Reserved

24h

Reserved

28h

Reserved

2Ch

Reserved

30h

Reserved

34h

Reserved

38h

Reserved

Interrupt Pin

Interrupt Line

3Ch

24 23

16 15

Offset

AM79C970 数据表(PDF) 81 Page - Advanced Micro Devices

AM79C970 数据表(HTML) 81 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

AM79C970 数据表(PDF) 81 Page - Advanced Micro Devices

AM79C970 数据表(HTML) 81 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载