AM79C970 datasheet(71/168 Pages) AMD

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P R E L I M I N A R Y

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Am79C970

Transmit Operation

The transmit operation and features of the PCnet-PCI

controller are controlled by programmable options. The

PCnet-PCI controller offers a136-byte Transmit FIFO to

provide frame buffering for increased system latency,

automatic retransmission with no FIFO reload, and

automatic transmit padding.

Transmit Function Programming

Automatic transmit features such as retry on collision,

FCS generation/transmission, and pad field insertion

can all be programmed to provide flexibility in the

(re-)transmission of messages.

Disable retry on collision (DRTY) is controlled by the

DRTY bit of the Mode register (CSR15) in the initiali-

zation block.

Automatic pad field insertion is controlled by the

APAD_XMT bit in CSR4. If APAD_XMT is set, auto-

matic pad field insertion is enabled, the DXMTFCS fea-

ture is over-ridden, and the 4-byte FCS will be added to

the transmitted frame unconditionally. If APAD_XMT is

clear, no pad field insertion will take place and runt

packet transmission is possible.

The disable FCS generation/transmission feature can

be programmed dynamically on a frame by frame basis.

See the ADD_FCS description of TMD1.

Transmit FIFO Watermark (XMTFW) in CSR80 sets the

point at which the BMU requests more data from the

transmit buffers for the FIFO. A minimum of XMTFW

empty spaces must be available in the transmit FIFO be-

fore the BMU will request the system bus in order to

transfer transmit packet data into the transmit FIFO.

Transmit Start Point (XMTSP) in CSR80 sets the point

when the transmitter actually attempts to transmit a

frame onto the media. A minimum of XMTSP bytes must

be written to the transmit FIFO for the current frame be-

fore transmission of the current frame will begin. (When

automatically padded packets are being sent, it is con-

ceivable that the XMTSP is not reached when all of the

data has been transferred to the FIFO. In this case, the

transmission will begin when all of the packet data has

been placed into the transmit FIFO.)

When the entire frame is in the FIFO, attempts at trans-

mission of preamble will commence regardless of the

value in XMTSP. The default value of XMTSP is 10b,

meaning there has to be 64 bytes in the Transmit FIFO

to start a transmission.

Automatic Pad Generation

Transmit frames can be automatically padded to extend

them to 64 data bytes (excluding preamble). This allows

the minimum frame size of 64 bytes (512 bits) for

802.3/Ethernet to be guaranteed with no software inter-

vention from the host/controlling process.

Setting the APAD_XMT bit in CSR4 enables the auto-

matic padding feature. The pad is placed between the

LLC data field and FCS field in the 802.3 frame.FCS is

always added if the frame is padded, regardless of the

state of DXMTFCS. The transmit frame will be padded

by bytes with the value of 00h. The default value of

APAD_XMT is 0; this will disable auto pad generation af-

ter H_RESET.

Preamble

1010....1010

Sync

10101011

Destination

Address

Source

Address

Length

LLC

Data

Pad

FCS

Bytes

46 — 1500

Bytes

Bits

18220C-29

Figure 27. ISO 8802-3(IEEE/ANSI 802.3) Data Frame

It is the responsibility of upper layer software to correctly

define the actual length field contained in the message

to correspond to the total number of LLC Data bytes en-

capsulated in the packet (length field as defined in the

ISO 8802-3 (IEEE/ANSI 802.3) standard). The length

value contained in the message is not used by the

PCnet-PCI controller to compute the actual number of

pad bytes to be inserted. The PCnet-PCI controller will

append pad bytes dependent on the actual number of

bits transmitted onto the network. Once the last data

byte of the frame has completed, prior to appending the

FCS, the PCnet-PCI controller will check to ensure that

544 bits have been transmitted. If not, pad bytes are

added to extend the frame size to this value, and the

FCS is then added.

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