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ST7DALIF2 数据表(PDF) 65 Page - STMicroelectronics

部件名 ST7DALIF2
功能描述  Configurable watchdog timer
PDF  171 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7DALIF2 数据表(HTML) 65 Page - STMicroelectronics

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ST7DALIF2
I/O ports
65/171
1.
When the I/O port is in input configuration and the associated alternate function is enabled as an output,
reading the DR register will read the alternate function output status.
2.
When the I/O port is in output configuration and the associated alternate function is enabled as an input,
the alternate function reads the pin status given by the DR register content.
3.
For true open drain, these elements are not implemented.
Analog alternate function
Configure the I/O as floating input to use an ADC input. The analog multiplexer (controlled
by the ADC registers) switches the analog voltage present on the selected pin to the
common analog rail, connected to the ADC input.
Analog recommendations
Do not change the voltage level or loading on any I/O while conversion is in progress. Do not
have clocking pins located close to a selected analog pin.
Caution:
The analog input voltage level must be within the limits stated in the absolute maximum
ratings.
Table 26.
I/O configurations
Hardware configuration
NOTE 3
CONDITION
PAD
VDD
RPU
EXTERNAL INTERRUPT
POLARITY
DATA BUS
PULL-UP
INTERRUPT
DR REGISTER ACCESS
W
R
FROM
OTHER
PINS
SOURCE (eix)
SELECTION
DR
REGISTER
CONDITION
ALTERNATE INPUT
ANALOG INPUT
To on-chip peripheral
COMBINATIONAL
LOGIC
NOTE 3
PAD
RPU
DATA BUS
DR
DR REGISTER ACCESS
R/W
VDD
REGISTER
PAD
RPU
DATA BUS
DR
DR REGISTER ACCESS
R/W
VDD
ALTERNATE
ALTERNATE
ENABLE
OUTPUT
REGISTER
BIT
From on-chip periphera
l
NOTE 3



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