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ST7DALIF2 数据表(PDF) 95 Page - STMicroelectronics |
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ST7DALIF2 数据表(HTML) 95 Page - STMicroelectronics |
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95 / 171 page ![]() ST7DALIF2 DALI communication module 95/171 Figure 43. DALI signal sampling In the example shown in Figure 44, the DCMCSR[3:0] bits are updated automatically at each edge trigger (DALI signal change of phase). At the same time the value of the 4-bit sample clock counter is reset. By reading the DCMCSR[3:0] bits software can detect changes in the DALI signal pulse length. DALI Signal 12345678910 11 12 13 14 15 12345678910 11 12 13 14 15 Phase Detector Shifter Clock Edge Trigger 4-bit Pre-shifter 001 x 4-bit sample clock counter 16-bit Shifter xxxx xxx1 |
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