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ST7DALIF2 数据表(PDF) 42 Page - STMicroelectronics |
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ST7DALIF2 数据表(HTML) 42 Page - STMicroelectronics |
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42 / 171 page ![]() Supply, reset and clock management ST7DALIF2 42/171 Figure 17. Reset and supply management block diagram 9.7.2 Auxiliary voltage detector (AVD) The Voltage Detector function (AVD) is based on an analog comparison between a VIT-(AVD) and VIT+(AVD) reference value and the VDD main supply voltage (VAVD). The VIT-(AVD) reference value for falling voltage is lower than the VIT+(AVD) reference value for rising voltage in order to avoid parasitic detection (hysteresis). The output of the AVD comparator is directly readable by the application software through a real time status bit (AVDF) in the SICSR register. This bit is read only. Caution: The AVD functions only if the LVD is enabled through the option byte. Monitoring the VDD main supply The AVD voltage threshold value is relative to the selected LVD threshold configured by option byte (see Section 22.1 on page 161). If the AVD interrupt is enabled, an interrupt is generated when the voltage crosses the VIT+(LVD) or VIT-(AVD) threshold (AVDF bit is set). In the case of a drop in voltage, the AVD interrupt acts as an early warning, allowing software to shut down safely before the LVD resets the microcontroller. See Figure 18. LOW VOLTAGE DETECTOR (LVD) AUXILIARY VOLTAGE DETECTOR (AVD) RESET VSS VDD RESET SEQUENCE MANAGER (RSM) AVD Interrupt Request SYSTEM INTEGRITY MANAGEMENT WATCHDOG SICSR TIMER (WDG) AVDIE AVDF STATUS FLAG 0 0 LVDRF LOCKED WDGRF 0 |
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