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数据搜索系统，热门电子元器件搜索 |
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HC705P6AGRS/D 数据表(PDF) 18 Page - NXP Semiconductors |
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HC705P6AGRS/D 数据表(HTML) 18 Page - NXP Semiconductors |
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18 / 134 page  General Description General Release Specification MC68HC705P6A — Rev. 1.0 General Description Figure 1-1. MC68HC705P6A Block Diagram NOTE: A line over a signal name indicates an active low signal. For example, RESET is active high and RESET is active low. Any reference to voltage, current, or frequency specified in the following sections will refer to the nominal values. The exact values and their tolerances or limits are specified in Section 14. Electrical Specifications. INTERNAL CPU CLOCK 16-BIT TIMER 1 INPUT CAPTURE 1 OUTPUT COMPARE PORT D LOGIC COP OSC COND CODE REG 1 1 1 I N Z C H INDEX REG CPU CONTROL 0 0 0 STK PNTR 1 1 0 0 0 0 0 ÷4 RESET OSC 1 OSC 2 PD7/TCAP SRAM — 176 BYTES USER EPROM — 4672 BYTES TCMP IRQ/VPP ALU 68HC05 CPU ACCUM PROGRAM COUNTER CPU REGISTERS ÷2 PA7 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PB5/SDO PB6/SDI PB7/SCK PORT B AND SIOP REGISTERS AND LOGIC VDD VSS PD5 PC3/AD3 PC4/AD2 PC5/AD1 PC6/AD0 PC7/VREFH PC2 PC1 PC0 BOOTLOADER ROM — 239 BYTES Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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